See how we’re collaborating with bay area colleges to expand STEM education and foster a new generation of semiconductor engineers through our EDA tools.
Need to Accelerate Technology Advancement? Here’s How Early Design Technology Co-Optimization Can Help
See how Design Technology Co-Optimization (DTCO) accelerates the chip design process by bringing together IP, TCAD, semiconductor lithography, and more.
Learn how TCAD software helps chip designers create radiation-hardened chips that conform to NASA’s pillars for reliability, security, and fault-tolerance.
By Editorial Team
Women play vital roles in developing the tools that engineers around the world use to design smart chips and develop secure code for the amazing devices that are changing the way we work and play. USA Today recently featured three Synopsys engineers, who reflect on their experiences as women in tech and offer advice on carving out success in a male-dominated field.
Posted in Application Security, Artificial Intelligence, Automotive, Cryptography, EDA, Healthcare, Internet of Things, IP, Machine Learning, Malware, Optical Design, Privacy, Quantum Computing, Robotics, Security, Superconducting Electronics, TCAD
On Wednesday, Synopsys announced a multi-year research and development contract with the U.S. Intelligence Advanced Research Projects Activity (IARPA) to advance EDA tool flows for Superconducting Electronics (SCE). Synopsys will collaborate with experts in the field of SCE as part of the IARPA SuperTools Program to develop a comprehensive set of tools that increase the scale, efficiency, and manufacturability of these designs. SCE has the potential to propel the electronics industry beyond CMOS, enabling a major leap in processing speeds and power efficiency.