See how our acquisition of Silicon Frontline Technology enhances IC design tools for power semiconductor devices through power device design & ESD verification.
Continue Reading...
Posted in Inside Synopsys, Power, Verification
We celebrate Earth Day 2023 by exploring how an environmentally responsible chip supply chain and SoC development process can reduce global energy consumption.
Continue Reading...
Posted in Inside Synopsys, Power
We explore hyperscale datacenters & internet traffic’s impact on climate change and discuss how energy-efficient system design shapes a sustainable future.
Continue Reading...
Posted in EDA, IP, Power
Learn how low-power design techniques such as clock gating, multi voltage domains, and register retention enable efficient IoT SoCs and IoT edge devices.
Continue Reading...
Posted in Internet of Things, Power
Effective SoC verification requires realistic software workloads during full chip power signoff; explore advantages of SoC emulation such as RTL power analysis.
Continue Reading...
Posted in Power, Verification
We explain how advanced power management techniques including Unified Power Format (UPF) expand low power design techniques and enhance IC design efficiency.
Continue Reading...
Posted in Power, Verification
Fall 2021 silicon design events are almost here! Join us for ARC Processor Virtual Summit, Verification Day 2021, and the Digital Design Technology Symposium.
Continue Reading...
Posted in Artificial Intelligence, Automotive, EDA, HPC, Inside Synopsys, Internet of Things, IP, Machine Learning, Multi-Die Systems, Power, Verification
Learn why SoC emulation is the next frontier for power system optimization, helping chip designers shift power verification left in the SoC design flow.
Continue Reading...
Posted in Power, Prototyping, Verification
We explain how to find dynamic power & leakage power bugs during SoC verification, using pre-silicon emulation for full-stack system-level power analysis.
Continue Reading...
Posted in Artificial Intelligence, Automotive, HPC, Power, Verification
We discuss low power design with Dr. Renu Mehra, R&D group director in our Digital Design Group, along with her career in STEM & the future of RTL synthesis.
Continue Reading...
Posted in Inside Synopsys, Power