From Silicon To Software

Archive for the 'Power' Category


Q&A with Dr. Renu Mehra of Synopsys Digital Design Group: Pioneering Automated Power Management Technologies for Chip Design

We discuss low power design with Dr. Renu Mehra, R&D group director in our Digital Design Group, along with her career in STEM & the future of RTL synthesis.

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Posted in Inside Synopsys, Power


Get Actionable Power Verification Results in Hours on Billion-Gate Designs

Power analysis is key to the SoC design process; learn how emulation solutions deliver actionable power verification results in hours to help meet PPA targets.

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Posted in 5G, Artificial Intelligence, Power, Verification


Addressing Power Challenges in AI Hardware

We explain how AI chip designers can address SoC glitch power & reduce hardware power consumption early in the design cycle by leveraging chip design tools.

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Posted in Artificial Intelligence, Power


Key Power Predictions for Chip Design in 2021

We discuss chip design predictions for 2021, including Artificial Intelligence & Internet of Things’ unique power management challenges between HPC & edge SoCs.

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Posted in Power