Learn about the new PCIe 6.0.1 specification and explore the role of PCI-SIG certified controller & verification IP for end-to-end protocol verification.
Learn how our partnership with SiMA.ai enables embedded edge machine learning applications with programmable processor IP cores and a software-driven ML SoC.
Explore the Compute Express Link (CXL) 3.0 specification and learn how it improves memory performance in data centers for HPC, AI, machine learning, and more.
Posted in IP
See how virtual prototyping, chip verification, and EDA tools helped Neuchips design an AI accelerator chip for the deep learning recommendation model (DLRM).
Alongside AI-enabled SoC design tools, our QuickStart Implementation Kits help chip designers develop high-performance processors for embedded applications.
Learn how Very Short-Range (VSR) connectivity & optical interconnects manage growing data center traffic by reducing power consumption & boosting bandwidth.
Explore the silicon testing methods that replace existing I/O with functional interfaces which reduce testing time and enable product lifecycle management.
We explain chiplets and share how Universal Chiplet Interconnect Express (UCIe) enables multi-die designs for SoC design innovation beyond Moore’s Law.
We explain the multi-chip module packaging types & die-to-die interfaces helping chip designers create high-performance, multi-die designs in the SysMoore Era.
Learn how programmable SmartNICs enable homogeneous data center networking and storage architectures while taking the load off of primary compute resources.