By Scott Knowlton, Director, Strategy & Solutions, Synopsys Solutions Group
Synopsys joins DARPA’s AISS program as a chip design contractor, developing security-aware EDA tools to accelerate time to market in the chipset design process.
Women play vital roles in developing the tools that engineers around the world use to design smart chips and develop secure code for the amazing devices that are changing the way we work and play. USA Today recently featured three Synopsys engineers, who reflect on their experiences as women in tech and offer advice on carving out success in a male-dominated field.
Posted in Application Security, Artificial Intelligence, Automotive, Cryptography, EDA, Healthcare, Internet of Things, IP, Machine Learning, Malware, Optical Design, Privacy, Quantum Computing, Robotics, Security, Superconducting Electronics, TCAD
By 2020 more than 50 billion devices will be connected to the internet ― according to Cisco’s latest forecast. Smartphone traffic will exceed PC traffic and broadband speeds will nearly double by 2021. And by the next Winter Olympics (Beijing 2022), 1 trillion networked sensors could be embedded in the world around us. While tech experts offer slightly different projections of actual numbers, it’s clear that the Internet of Things (IoT) will grow exponentially. And this explosion means new opportunities for one-time programmable (OTP) non-volatile memory (NVM).
Chip designers can use Synopsys technology to accelerate Cryptographic Module Validation Program (CMVP) and Federal Information Processing Standard (FIPS) 140-2 certification for applications requiring high levels of security. FIPS 140-2 validation is only required if a hardware security module is to be sold to the U.S. government and if it uses cryptography in a security system that handles sensitive but unclassified information. However, it can also be a powerful security product differentiator in the commercial market.