From Silicon To Software

Archive for the 'IP' Category


What’s Driving the Demand for 200G, 400G, and 800G Ethernet?

Hyperscale data centers are driving demand for high-bandwidth Ethernet protocols at speeds up to 800G to support HPC, AI, video streaming, and cloud computing.

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Posted in Artificial Intelligence, HPC, IP, Verification


Customer Spotlight: Aaroh Labs Delivers Rapid Design of Advanced-Node SoCs

Synopsys customer Aaroh Labs’s expertise in SoC design, post-silicon validation & analog components facilitates innovation in large, complex, multi-core chips.

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Posted in EDA, HPC, Internet of Things, IP


How EDA in the Cloud Fuels Semiconductor Innovation

Cloud-based EDA tools are sparking innovation in the semiconductor design industry, learn how they help chip designers meet time, quality, and cost targets.

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Posted in Cloud, EDA, IP


Q&A with Jumana Muwafi, Sr. VP of Engineering: Pushing the Envelope on IP Innovation

Sr. VP of Engineering Jumana Muwafi explains the role of semiconductor IP development in electronic design automation & shares advice for women in leadership.

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Posted in Inside Synopsys, IP


How to Achieve High Bandwidth and Low Latency Die-to-Die Connectivity

Die-to-die interfaces in hyperscale data centers require high bandwidth & low latency, learn how this innovation drives modern high-performance computing (HPC).

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Posted in 3D-ICs, Artificial Intelligence, HPC, IP


Customer Spotlight: Tachyum’s Universal Processor for Hyperscale Data Centers

Synopsys customer Tachyum’s new Prodigy processor is set to transform hyperscale data centers, making AI & high-performance computing (HPC) more accessible.

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Posted in Artificial Intelligence, IP


How ISO/SAE 21434 Impacts EDA and IP Vendors

We explain the automotive cybersecurity framework of ISO/SAE 21434, and how IP & EDA tools help designers build security into automotive SoCs & sensors.

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Posted in Automotive, EDA, IP, Security


Arm Collaboration Helps You Meet PPA Targets Faster for AI, Cloud, and 5G Infrastructure Chiplets

Explore our collaboration with Arm and learn how our EDA tools help you design chiplets and SoCs while meeting aggressive PPA and time-to-market targets.

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Posted in 5G, Artificial Intelligence, Cloud, HPC, IP


How PCI Express 6.0 Can Enhance Bandwidth-Hungry High-Performance Computing SoCs

Learn how PCIe 6.0 will transform the High Performance Computing (HPC) landscape, delivering double the bandwidth for SoCs in cloud computing & AI applications.

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Posted in HPC, IP


SNUG World 2021 to Inspire Electronic Design Innovation

SNUG® World 2021 is almost here! See the latest in electronic design automation (EDA) and meet chip design & verification experts from around the world.

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Posted in EDA, Inside Synopsys, IP