From Silicon To Software

Archive for the 'IP' Category

 

Get the Most Out of Your Next-Generation PCIe 6.0.1 Design

Learn about the new PCIe 6.0.1 specification and explore the role of PCI-SIG certified controller & verification IP for end-to-end protocol verification.

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Posted in Cloud, Internet of Things, IP, Verification

 

SiMa.ai Teams with Synopsys to Ease the Path to Deliver ML Applications for the Embedded Edge

Learn how our partnership with SiMA.ai enables embedded edge machine learning applications with programmable processor IP cores and a software-driven ML SoC.

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Posted in Artificial Intelligence, Customer Spotlight, IP

 

How CXL 3.0 Fuels Faster, More Efficient Data Center Performance

Explore the Compute Express Link (CXL) 3.0 specification and learn how it improves memory performance in data centers for HPC, AI, machine learning, and more.

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Posted in IP

 

Customer Spotlight: Neuchips Tapes Out Groundbreaking AI Accelerator

See how virtual prototyping, chip verification, and EDA tools helped Neuchips design an AI accelerator chip for the deep learning recommendation model (DLRM).

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Posted in Artificial Intelligence, Customer Spotlight, IP, Verification

 

Optimizing High-Performance Processor Designs with AI-Enabled Implementation Kits

Alongside AI-enabled SoC design tools, our QuickStart Implementation Kits help chip designers develop high-performance processors for embedded applications.

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Posted in 5G, Artificial Intelligence, Automotive, IP

 

How Does Short-Reach Connectivity Transcend Physical and Power Limits?

Learn how Very Short-Range (VSR) connectivity & optical interconnects manage growing data center traffic by reducing power consumption & boosting bandwidth.

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Posted in IP, Optical Design

 

How High-Speed Functional Interfaces Enable Fast, In-Field Silicon Testing

Explore the silicon testing methods that replace existing I/O with functional interfaces which reduce testing time and enable product lifecycle management.

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Posted in Internet of Things, IP, Prototyping, Verification

 

UCIe Heralds a Robust Chiplet Ecosystem for a New Era of SoC Innovation

We explain chiplets and share how Universal Chiplet Interconnect Express (UCIe) enables multi-die designs for SoC design innovation beyond Moore’s Law.

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Posted in 3D-ICs, Artificial Intelligence, EDA, HPC, Internet of Things, IP

 

A Primer on Chip Packaging for Multi-Die Designs

We explain the multi-chip module packaging types & die-to-die interfaces helping chip designers create high-performance, multi-die designs in the SysMoore Era.

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Posted in 3D-ICs, Artificial Intelligence, HPC, IP

 

How Can SmartNICs Move Your Data Center Forward?

Learn how programmable SmartNICs enable homogeneous data center networking and storage architectures while taking the load off of primary compute resources.

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Posted in 3D-ICs, Cloud, EDA, HPC, IP, Verification