From Silicon To Software

Archive for the 'HPC' Category

 

What’s Driving the Demand for 200G, 400G, and 800G Ethernet?

Hyperscale data centers are driving demand for high-bandwidth Ethernet protocols at speeds up to 800G to support HPC, AI, video streaming, and cloud computing.

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Posted in Artificial Intelligence, HPC, IP, Verification

 

Customer Spotlight: Aaroh Labs Delivers Rapid Design of Advanced-Node SoCs

Synopsys customer Aaroh Labs’s expertise in SoC design, post-silicon validation & analog components facilitates innovation in large, complex, multi-core chips.

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Posted in EDA, HPC, Internet of Things, IP

 

Running a Trillion-Cycle Application Workload with Fast SoC Emulation

Explore the impact of high-performance SoC emulation on chip design & learn how full-visibility debugging gives designers a jump on SoC verification.

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Posted in 5G, Artificial Intelligence, Automotive, HPC, Verification

 

Empowered By Real-World Software to Find Power Bugs

We explain how to find dynamic power & leakage power bugs during SoC verification, using pre-silicon emulation for full-stack system-level power analysis.

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Posted in Artificial Intelligence, Automotive, HPC, Power, Verification

 

How to Achieve High Bandwidth and Low Latency Die-to-Die Connectivity

Die-to-die interfaces in hyperscale data centers require high bandwidth & low latency, learn how this innovation drives modern high-performance computing (HPC).

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Posted in 3D-ICs, Artificial Intelligence, HPC, IP

 

Arm Collaboration Helps You Meet PPA Targets Faster for AI, Cloud, and 5G Infrastructure Chiplets

Explore our collaboration with Arm and learn how our EDA tools help you design chiplets and SoCs while meeting aggressive PPA and time-to-market targets.

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Posted in 5G, Artificial Intelligence, Cloud, HPC, IP

 

Why Hyper-Convergent Designs Demand an All or Nothing Approach

We explain the importance of hyper-convergent-friendly chip design tools for larger, more complex IC designs powering HPC & advanced software infrastructure.

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Posted in 3D-ICs, Artificial Intelligence, EDA, HPC, Machine Learning

 

Scaling FPGA-Based Prototyping to Meet Verification Demands of Complex SoCs

Explore the history of FPGA prototyping in the SoC design/verification process and learn about HAPS-100, a new prototyping system for complex AI & HPC SoCs.

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Posted in 3D-ICs, 5G, Artificial Intelligence, EDA, HPC, Prototyping, Verification

 

Why Hyper-Convergent Chip Designs Call for a New Approach to Circuit Simulation

We explore how EDA tools enable hyper-convergent IC designs, supporting the PPA and yield targets required by advanced 3DICs and SoCs used in AI and HPC.

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Posted in 3D-ICs, Artificial Intelligence, EDA, HPC

 

How PCI Express 6.0 Can Enhance Bandwidth-Hungry High-Performance Computing SoCs

Learn how PCIe 6.0 will transform the High Performance Computing (HPC) landscape, delivering double the bandwidth for SoCs in cloud computing & AI applications.

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Posted in HPC, IP