We recap 2022 at Synopsys, including cloud-based chip design tools, machine learning and AI-powered EDA solutions, multi-die systems, and secure interface IP.
Posted in Artificial Intelligence, Cloud, EDA, HPC, Inside Synopsys, IP, Multi-Die Systems, Photonics
Explore the key components of high-performance computing and learn how to design reliability, availability, and serviceability (RAS) into HPC clusters & systems.
We explain chiplets and share how Universal Chiplet Interconnect Express (UCIe) enables multi-die designs for SoC design innovation beyond Moore’s Law.
Posted in Artificial Intelligence, EDA, HPC, Internet of Things, IP, Multi-Die Systems
We explain the multi-chip module packaging types & die-to-die interfaces helping chip designers create high-performance, multi-die designs in the SysMoore Era.
Posted in Artificial Intelligence, HPC, IP, Multi-Die Systems
Learn how programmable SmartNICs enable homogeneous data center networking and storage architectures while taking the load off of primary compute resources.
Posted in Cloud, EDA, HPC, IP, Multi-Die Systems, Verification
Explore data center history including data volume growth, new data center architectures, hyperscalers, and the influence of high performance computing (HPC).
Posted in HPC
Explore the advantages of data center disaggregation and learn how optical interconnects enable this new architecture with the help of co-packaged optics.
Explore the world of industry standards development and learn how the 800G Ethernet standard impacts high-bandwidth connectivity for networking & data centers.
PCIe 5.0 designs are currently in massive deployment; learn about the standard and explore PCIe 5.0 applications and the importance of silicon-proven IP.
Posted in Automotive, Cloud, HPC, IP
High performance computing continues to expand & evolve; our team shares their 2022 HPC predictions including new HPC applications and processor architectures.
Posted in HPC
