Explore the history of FPGA prototyping in the SoC design/verification process and learn about HAPS-100, a new prototyping system for complex AI & HPC SoCs.
We explore how EDA tools enable hyper-convergent IC designs, supporting the PPA and yield targets required by advanced 3DICs and SoCs used in AI and HPC.
Learn how PCIe 6.0 will transform the High Performance Computing (HPC) landscape, delivering double the bandwidth for SoCs in cloud computing & AI applications.
3D ICs help SoC designers extend the design scale beyond Moore’s Law; learn how unified 3D IC design tools enable faster convergence for multi-die chips.
Explore ethernet’s impact on the hyperscale data center and learn how EDA tools enable new high-bandwidth connectivity for networking, HPC, AI SoCs & more.
Cloud computing security starts at hyperscale data centers; learn how embedded IDE modules protect data across interfaces including PCIe 5.0 and CXL 2.0.
We cap off 2020 with a look at this year’s Smart Everything developments, including AI advancements, new EDA tools, 5G’s global rollout, and security in design.
Synopsys thought leaders explore the future of High-Performance Computing (HPC) and the cloud in 2021, including new applications & COVID-19’s continued impact.
Posted in HPC
HPC solutions are in high demand; learn how die-to-die connectivity enables new multi-chip module SoCs that provide higher yield & power for HPC applications.
By Scott Knowlton, Director, Strategy & Solutions, Synopsys Solutions Group