Explore the impact of high-performance SoC emulation on chip design & learn how full-visibility debugging gives designers a jump on SoC verification.
Explore our collaboration with Arm and learn how our EDA tools help you design chiplets and SoCs while meeting aggressive PPA and time-to-market targets.
New 5G infrastructure is powering smart city projects worldwide; explore the importance of IoT security for smart city solutions in public safety & logistics.
Explore the history of FPGA prototyping in the SoC design/verification process and learn about HAPS-100, a new prototyping system for complex AI & HPC SoCs.
Power analysis is key to the SoC design process; learn how emulation solutions deliver actionable power verification results in hours to help meet PPA targets.
3D ICs help SoC designers extend the design scale beyond Moore’s Law; learn how unified 3D IC design tools enable faster convergence for multi-die chips.
Learn how electronic design automation (EDA) tools & silicon-proven IP enable today’s most influential smart tech, including ADAS, 5G, IoT, and Cloud services.
We cap off 2020 with a look at this year’s Smart Everything developments, including AI advancements, new EDA tools, 5G’s global rollout, and security in design.
Posted in 5G, Aerospace and Defense, Application Security, Artificial Intelligence, Automotive, Cloud, EDA, HPC, Inside Synopsys, Internet of Things, Optical Design, Prototyping, Security, Verification
5G rollout means new challenges in chip design; learn how our 5G IP solutions & SoC design tools deliver top performance for 5G infrastructure applications.
Posted in 5G
Cellular carriers would like to have their new 5G networks up by the end of 2018 or early 2019. One problem: they need a set of standards to create the new technology. Last weekend, tech representatives met and made significant first step for technology companies to start building out the necessary 5G chips and software.