New Horizons for Chip Design

Archive for the '5G' Category

 

From Silicon Design to End of Life—Mitigate Memory Failures to Boost Reliability

See how memory design techniques boost reliability throughout the silicon lifecycle and learn the difference between safety & reliability in electronic design.

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Posted in 5G, Automotive, HPC, Internet of Things, Multi-Die Systems, Verification

 

UFS 4.0 Explained: How the Latest Flash Storage Standard Propels Our 5G World

We explain the UFS 4.0 specification for flash storage and explore how data transfer rates up to 5800 MBps enhance smartphones, vehicles, AR/VR, and beyond.

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Posted in 5G, IP, Security

 

How the MACsec Protocol Keeps Ethernet Networks Secure

We explain how the MACsec protocol works as one of the fundamentals of network security, ensuring Ethernet interface security for automotive, HPC and beyond.

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Posted in 5G, Automotive, Cloud, HPC, IP, Security

 

Optimizing High-Performance Processor Designs with AI-Enabled Implementation Kits

Alongside AI-enabled SoC design tools, our QuickStart Implementation Kits help chip designers develop high-performance processors for embedded applications.

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Posted in 5G, Artificial Intelligence, Automotive, IP

 

5G SoC Design: Why You Need Fast, Thorough Chip-Level Testing

5G SoC design is powered by virtual chip verification tools; explore our partnership w/ Keysight and how it accelerates 5G rollout for 5G systems manufacturers.

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Posted in 5G, Verification

 

Turning mm Waves into a Netflix Movie: 5G SoC Emulation

We explore the challenges of 5G rollout and how SoC emulation enables powerful, reliable 5G SoC verification to fuel the explosion of 5G use cases such as IoT.

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Posted in 5G, Verification

 

What Is a Multi-Die Design—and What’s Driving Its Growing Popularity?

Explore the growing popularity of multi-die chip designs and learn how a system-level view helps chip designers reach aggressive PPA targets for data centers.

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Posted in 5G, Artificial Intelligence, HPC, IP, Multi-Die Systems

 

Why Processor Workloads Are Changing as Moore’s Law Slows

Explore how processor workloads are changing as Moore’s Law slows, driving new processor architectures that meet the performance requirements of modern SoCs.

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Posted in 5G, Artificial Intelligence, IP

 

Running a Trillion-Cycle Application Workload with Fast SoC Emulation

Explore the impact of high-performance SoC emulation on chip design & learn how full-visibility debugging gives designers a jump on SoC verification.

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Posted in 5G, Artificial Intelligence, Automotive, HPC, Verification

 

Arm Collaboration Helps You Meet PPA Targets Faster for AI, Cloud, and 5G Infrastructure Chiplets

Explore our collaboration with Arm and learn how our EDA tools help you design chiplets and SoCs while meeting aggressive PPA and time-to-market targets.

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Posted in 5G, Artificial Intelligence, Cloud, HPC, IP