What’s Driving the Demand for Chiplets?
Learn how chiplets form the basis of multi-die HPC processor architectures, fueling modern HPC applications and scaling performance & power beyond Moore’s Law.
Sharpen Your Silicon Design Expertise at Synopsys Events this Fall
Fall 2021 silicon design events are almost here! Join us for ARC Processor Virtual Summit, Verification Day 2021, and the Digital Design Technology Symposium.
Posted in 3D-ICs, Artificial Intelligence, Automotive, EDA, HPC, Inside Synopsys, Internet of Things, IP, Machine Learning, Power, Verification
What Is a Multi-Die Design—and What’s Driving Its Growing Popularity?
Explore the growing popularity of multi-die chip designs and learn how a system-level view helps chip designers reach aggressive PPA targets for data centers.
Posted in 3D-ICs, 5G, Artificial Intelligence, HPC, IP
3DIC Design: Optimizing PPA Per Cubic mm Requires a New Approach
3DIC technology is enjoying a surge in popularity; learn how IC design engineering innovations help chip designers take a silicon-first approach to 3DIC design.
The Importance of Chip Manufacturing & Test Data Analytics in the Semiconductor Industry
Data & analytics have a massive impact on the chip design process; we explore how fast/precise chip data analytics solutions improve IC design quality & yield.
How to Achieve High Bandwidth and Low Latency Die-to-Die Connectivity
Die-to-die interfaces in hyperscale data centers require high bandwidth & low latency, learn how this innovation drives modern high-performance computing (HPC).
Posted in 3D-ICs, Artificial Intelligence, HPC, IP
Why Hyper-Convergent Designs Demand an All or Nothing Approach
We explain the importance of hyper-convergent-friendly chip design tools for larger, more complex IC designs powering HPC & advanced software infrastructure.
Posted in 3D-ICs, Artificial Intelligence, EDA, HPC, Machine Learning
Synopsys Makes Headlines with PrimeSim Continuum, an Innovative Circuit Simulation Solution
Our new IC design tool, PrimeSim Continuum, enables the next generation of hyper-convergent IC designs. Learn more from eeNews, Electronic Design & EE Times.
Posted in 3D-ICs, EDA, Machine Learning, Prototyping, Verification
Advanced Nodes Drive Demand for Advanced Library Characterization and Validation Solutions
Introducing PrimeLib, an SoC design tool that maps the latest chip technologies & enables correct-by-construction design for SoCs at advanced process nodes.
Posted in 3D-ICs, EDA, Prototyping, Verification
PrimeSim Continuum Meets the Challenge of Hyper-Convergent ICs with Faster SPICE Engines and a More Unified Simulation Workflow
Learn how PrimeSim Continuum, our new IC design solution, delivers the IC verification tools & SPICE simulation speed needed for modern hyper-convergent ICs.
Posted in 3D-ICs, EDA, Machine Learning, Prototyping, Verification
