The Quest for Bugs: The Key Challenges
ASIC hardware verification is a complex process; explore key challenges and bug hunting, debug, and SoC verification solutions to satisfy sign-off requirements.
Posted in Verification
Kiran Vittal
Kiran Vittal is a senior product marketing director in the Verification Group at Synopsys, with 25 years of experience in EDA and semiconductor design. He has marketing responsibility for Synopsys software verification products. Prior to joining Synopsys, Kiran held product marketing, field applications, and engineering positions at Atrenta, ViewLogic, and Mentor Graphics. He holds an MBA from Santa Clara University and a bachelor’s degree in electronic engineering from Karnatak University.
Posts by Kiran Vittal:
Beyond Machine Learning and Homomorphic Encryption: Why Advanced Verification Is Key to Fueling a New Era of AI Chips
Learn how advanced SoC verification (equivalence checking) & SoC security (homomorphic encryption) technologies help chip designers create specialized AI chips.
Posted in Artificial Intelligence, Verification
Find Bugs Earlier Via On-the-Fly Code Checking for Productive Chip Design and Verification
Learn how correct-by-construction coding enables a more productive chip design process, as new code review tools address bugs early in the design process.
Posted in Verification
