Explore the impact of high-performance SoC emulation on chip design & learn how full-visibility debugging gives designers a jump on SoC verification.
Dr. Johannes Stahl is a senior director of product marketing at Synopsys, where he is currently responsible for product marketing, product strategy, and business development for Synopsys emulation and prototyping business lines. Prior to Synopsys, he worked at CoWare and was responsible for all aspects of business, including working on advanced design solutions for digital signal processing applications. Johannes holds advanced degrees in electrical engineering from Aachen University, Germany.
Posts by Johannes Stahl:
The Quest for the Most Advanced Networking SoC: Achieving Breakthrough Verification Efficiency with Cloud-Based Emulation
Learn how cloud-based SoC design and functional verification systems such as ZeBu Cloud accelerate networking SoC readiness across both hardware & software.
Explore the history of FPGA prototyping in the SoC design/verification process and learn about HAPS-100, a new prototyping system for complex AI & HPC SoCs.
Power analysis is key to the SoC design process; learn how emulation solutions deliver actionable power verification results in hours to help meet PPA targets.