Effective SoC verification requires realistic software workloads during full chip power signoff; explore advantages of SoC emulation such as RTL power analysis.
Godwin Maben is a low power architect and scientist at Synopsys, where he focuses on low-power challenges associated with multi-voltage/multi-supply designs. He has been instrumental in first-time silicon deployment of various low-power architectures and has defined many specifications for the automation of most low-power-sensitive designs. Godwin is a graduate of Bangalore University.
Posts by Godwin Maben:
We discuss chip design predictions for 2021, including Artificial Intelligence & Internet of Things’ unique power management challenges between HPC & edge SoCs.
Posted in Power
By Godwin Maben, Low Power Architect and Scientist for Synopsys Design Group