We sat down with intern Priyanka Joshi to discuss low-power, mixed-signal DDR design ahead of the 2021 Women in Semiconductor Hardware (WISH) conference.
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Fall 2021 silicon design events are almost here! Join us for ARC Processor Virtual Summit, Verification Day 2021, and the Digital Design Technology Symposium.
Join us at AI Hardware Summit 2021 for technical sessions on tools & advancements in AI chips, SoC design, deep learning acceleration, and AI architectures.
Posted in Artificial Intelligence
Marketing intern Hannah recaps her experience in the Synopsys summer internship program and shares insights from interns in data analytics, electrical engineering, and more.
Posted in Inside Synopsys
Synopsys customer Aaroh Labs’s expertise in SoC design, post-silicon validation & analog components facilitates innovation in large, complex, multi-core chips.
Synopsys co-CEO Aart de Geus explains how AI has become an important chip design tool as semiconductor companies continue to innovate in the SysMoore Era.
Posted in EDA
Sr. VP of Engineering Jumana Muwafi explains the role of semiconductor IP development in electronic design automation & shares advice for women in leadership.
Synopsys customer Tachyum’s new Prodigy processor is set to transform hyperscale data centers, making AI & high-performance computing (HPC) more accessible.
Our new IC design tool, PrimeSim Continuum, enables the next generation of hyper-convergent IC designs. Learn more from eeNews, Electronic Design & EE Times.
Q&A with Dr. Renu Mehra of Synopsys Digital Design Group: Pioneering Automated Power Management Technologies for Chip Design
We discuss low power design with Dr. Renu Mehra, R&D group director in our Digital Design Group, along with her career in STEM & the future of RTL synthesis.