How Cloud EDA Tools Enable Preconfigured Chip Design Flows 

With virtually unlimited and advanced compute resources providing the capacity that modern chip design teams demand, the cloud can truly transform chip design using electronic design automation (EDA) tools. That’s the value that Synopsys provides with Synopsys Cloud, the industry’s first broad-scale cloud software-as-a-service (SaaS) solution.

A key benefit of this SaaS approach is to ensure that engineers can reduce overall chip design cycles by leveraging pre-optimized compute through a one-stop, browser-based experience. Engineers can then focus on the intricacies of their chip design, not on the infrastructure configuration, compute selection, or license management.

However, chip design flows are complex to implement, with each step of the chip design and verification process, i.e. sub-flows, requiring multiple EDA tools to work together as well as unique infrastructure needs. Combining individual EDA tools into a reusable chip design flow requires complex upfront setup time and gets extremely support-intensive, especially for engineers that are using new tools with the latest available compute options. Cloud-native SaaS solutions in enterprise applications such as customer relationship management (CRM) or data analytics have taught us that standardization based on automation, best-in-class benchmarking, and reusability can significantly reduce setup times and accelerate time-to-results.

1. Analog Instance

Analog, mixed-signal, and custom digital logic are integral to modern chips, embedded inside advanced SoCs or as discrete components fundamental to enabling innovation across multiple applications in high-performance computing, mobile/5G, IoT, automotive, healthcare, etc. The Analog Instance on Synopsys Cloud provides automated and standardized flows needed to perform analog circuit design, simulation, layout, and verification tasks across a variety of applications. These flows work with a carefully curated set of cloud virtual machines optimized for the user’s needs.

2. Digital Instance

Digital design, implementation and sign-off workflows can be highly complex given the broad range of automation tools available, along with different applications over a broad spectrum of process nodes. The Digital Instance on Synopsys Cloud is a complete RTL-to-signoff automation environment natively built for SaaS applications. All required EDA tools, third-party technologies, and pre-optimized compute virtual machine options are available for engineers with a few clicks in the browser window. And all of this is based on market-leading synthesis, sign-off, and implementation tools from Synopsys.

3. Verification Instance

Verifying today’s complex, large SoCs is a very challenging and expensive task that can easily take more than 50% of project time and compute cycles. With the Verification Instance on Synopsys Cloud, we are delivering a complete verification solution with preconfigured flows that combines easy-to-use simulation, smart debugging, and analytics with the power of the FlexEDA model. Verification teams can quickly and efficiently scale on the cloud and achieve fast coverage closure, increasing design quality and reducing re-spin risks.

With the introduction of Synopsys Cloud with SaaS Instances, chip designers can take advantage of preconfigured, ready-to-use flows, simplified automated execution, and pre-optimized flow-specific compute to quickly ramp up on designing and verifying their chips, delivering reliable and high-quality results and shortening their time-to-market.