By Srinivas Macha, Sales Account Manager, Synopsys Customer Success Group
What’s the best way to uncover hidden design talent? Reaching aspiring, bright engineering minds. This was the idea behind a recent Cloud-Based Analog IC Design Hackathon in India, sponsored by Synopsys, VLSI System Design (VSD), and the Indian Institute of Technology at Hyderabad (IITH). And a special thanks goes to Dr. Ashudeb Dutta at IITH who helped to make it all happen. Undergirding the effort was government support as part of the Chips to Startup (C2S) initiative, fostering the nation’s self-reliance in electronic system design. The industry-academic-government collaboration resulted in a three-week design contest, challenging students, including those in rural areas and smaller city centers, to use state-of-the-art analog design concepts over the cloud to create IP that could integrate into real-world IC designs.
The hackathon had many advantages for the collaborating organizations, from increasing the engineering talent pipeline to inspiring a nation of tech-savvy empowerment. But at the root of it, there was one objective: Nurture our next generation of IC designers.
Synopsys Academic & Research Alliances provided all the design tools and solutions for the hackathon. VLSI System Design (VSD) provided training for the engineering students as well as the ability to scale the program across the country, and IITH was the educational sponsor. Students benefited from the hands-on mentorship, access to tools and environments, and a forum to share their ideas, learn, and grow.
The participating students from universities across India, along with 23 additional countries, received the following support:
All participants submitted a basic one-page IEEE design vision document that clearly described their design along with the expected input/output characteristics. At the end of the hackathon, if the final simulated pre-layout characteristics matched the expected characteristics in the vision document, then their project was considered complete. Winners were categorized as Outstanding, Excellent, Very Good and Good based on the complexity of the design they implemented.
The outcome of the hackathon was an overwhelming success. Outstanding designs were lauded for their innovative and fresh design approaches, such as the Differential End Current Starved VCO for the Application of PLL Implemented in 28nm CMOS Technology by Trinath Harikrishna from SRM Institute of Science and Technology (SRMIST). And there were many more fantastic designs resulting from the effort.
Out of nearly 2,500 entrants, there were 248 completed designs. Out of four ranked categories, 18 designs were top ranked in the “Outstanding” category. A full list of designs can be accessed through the result links on the Cloud-Based Analog IC Design Page.
While the world is quickly moving digital, analog design remains foundational to digital circuits. This is because chips must respond to basic time stimulus and also variability in temperature, performance, and operating voltage. The very nature of these types of stimulus requires analog design. If you are designing in analog, you are treating circuit stimulus as a varying signal over time: While a digital state is characterized by a one or zero (on or off), an analog state is characterized by degrees. Analog design is used to compensate for variabilities by providing greater fidelity and precision, consistency, and performance. By giving students access to Synopsys tools and solutions for analog design and training, they gain understanding, experience, and qualifications that will help their future growth in this important area of circuit design.
For the Hackathon, students used Synopsys Custom Compiler™ design environment for productivity, performance, and ease-of-use in analog design. The Custom Compiler tool, a key component of the Synopsys Custom Design Family, includes design entry, simulation management and analysis, and custom layout editing features. The students used a cloud-based platform to design, including content, labs equipped with design tools, and the assessment methodology to come up with their design ideas. They submitted their final design on a GitHub repository.
According to Deloitte and SemiEngineering “…some 82% of executives reported a shortage of qualified technical candidates.” This shortfall of engineering talent coupled with exciting leading-edge technologies on our horizon such as AI/ML, 5G, and cloud, makes it ever more important to nurture our up-and-coming engineers. When industry, academic, and government institutions work together to encourage bright minds to pursue careers in the field, anything is possible.
The Cloud-Based Analog IC Design Hackathon brought together a large group of people with like-minded interests who were excited to learn more about the world of analog IC design, share their ideas, and learn from each other in a fun way. This experience is one that the students can take forward and build upon. In the end, The Cloud-Based Analog IC Design Hackathon was so much more than a contest. It was a place where student ingenuity, creativity, and intellect could shine.