From Silicon To Software

 

AMD’s Collaboration with Synopsys Leads to Breakthrough Performance of Its 3rd Gen AMD EPYC™ Processors with 3D V-Cache™ Technology for Synopsys EDA Workloads

eda workloads
By Editorial Team

As chip designs continue to grow bigger and become more complex, the demand for superior compute power, performance, and advanced verification methodologies has expanded exponentially. Chip designers across the world have pushed the limits of Moore’s law and silicon performance on electronic design automation (EDA) workloads while navigating demanding high-performance computing (HPC) requirements and storage challenges.

However, in a landscape where time-to-market is critical, semiconductor companies realize that the speedup required for compute-intensive applications has undoubtedly become a bottleneck for large designs. From large network system-on-chip (SoC) designs to specialized processors like CPUs and GPUs, design teams face numerous hurdles to functionally validate hardware and software while finding the best path to optimize EDA workloads across scenarios. Designs that require a lot more functionality to be managed on a single chip need advanced processing capabilities to meet intense computing demands and scale performance.

AMD and Synopsys have collaborated to enable mutual customers to leverage the latest 3rd Gen AMD EPYC™ Processors with AMD 3D V-Cache™ technology with Synopsys’ broad portfolio of EDA solutions for AMD EPYC processors. AMD has driven innovation in enterprise and HPC computing technologies ― the building blocks for the data centers both on-prem and in the cloud. With Synopsys’ strength in fueling a new era of innovation from silicon to software, this announcement drives a new standard for customers to transform their data center operations and EDA workloads with high-performance processors.

Delivering More Performance Per Core

Built on AMD 3D Chiplet architecture and using 7nm process technology, AMD EPYC 7003 Processors with AMD 3D V-Cache technology employ advanced logic stacking based on a copper-to-copper hybrid bonding “bumpless” chip-on-wafer process. This delivers more than 200x the interconnect densities of current 2D CPU technologies (and over 15x the interconnect densities of other 3D CPU technologies using solder bumps) over AMD’s prior generation processors, helping to reduce latency, boost bandwidth, and enhance power and thermal efficiencies.[i]

Synopsys VCS®, the industry’s highest performance simulation solution, takes full advantage of AMD EPYC multicore processors with state-of-the-art fine-grained parallelism technology, enabling users to easily speed up high-activity, long-cycle tests by allocating more cores at runtime.

The need for increasing functionality from today’s large SoC designs is no secret. With EDA workloads being highly algorithmic in nature and requiring vast amounts of memory, the latest 3rd Gen AMD EPYC processors with AMD 3D V-Cache technology offer modern data centers increased performance for technical computing workloads. Synopsys VCS unlocks significant performance advantages by leveraging 768 MB of L3 cache. With the added L3 cache of standard 3rd Gen AMD EPYC processors and up to 64 “Zen 3” cores per processor, customers now have access to the best compiler technology and processor specifications to fuel next-generation designs.

“The volume of compute that Synopsys VCS runs on in the latest 3rd Gen AMD EPYC processors is massive. With the significant memory and cache required by today’s compute-intensive EDA workloads, the memory efficiency at runtime with VCS is exceptional and gives us a big competitive edge,” said Sandeep Mehrotra, vice president of engineering at Synopsys. “Our close collaboration with AMD continues to accelerate technology advances for our customers by empowering them to tackle verification challenges and the complexity of tomorrow’s SoCs.”

AMD EPYC 7003 Processors with AMD 3D V-Cache technology triples the amount of available L3[ii], helping deliver faster time-to-results on targeted workloads like EDA, CFD, and FEA software and solutions while providing socket compatibility with existing AMD EPYC 7003 platforms.[iii] By increasing the pool of L3 cache that is lower latency and closer to the core than main memory, AMD EPYC 7003 Processors with AMD 3D V-Cache utilize the same shared memory architecture as the rest of the 3rd Generation EPYC™ family.

“We designed the 3rd Gen AMD EPYC processors with AMD 3D V-Cache technology to give our customers exactly what they said they needed: increased performance, better energy efficiency, and lower total cost of ownership for critical technical compute workloads,” said Ram Peddibhotla, corporate vice president, EPYC product management, AMD. “With leadership architecture, performance, and modern security features, 3rd Gen AMD EPYC processors with AMD 3D V-Cache technology are an outstanding choice for complex simulations and rapid product development.”

Using the testbench and assertion capabilities built into VCS, AMD EPYC processor benchmarks for the Synopsys VCS functional simulator show that 16-core AMD EPYC 7003 Processors with AMD 3D V-Cache technology delivered an average 66% faster RTL verification[iv] compared to the standard 3rd Gen AMD EPYC7003 Series processors. Currently, Synopsys VCS is used by many of the world’s top semiconductor companies to catch defects early in the development process before a chip is committed to silicon.

Accelerate Your Verification Journey Today

As chip designers strive to find innovative ways to extract superior performance, include more functionality, and incorporate intelligence into the underlying silicon, workload performance with the confidence of modern security will be integral to achieving exceptional energy savings and speeding the product development cycle. We look forward to enabling new market capabilities with this collaboration and encourage designers to push the envelope of SoC designs to support tomorrow’s advanced process technologies.

Learn More About Synopsys Verification Solutions

Synopsys VCS provides key turnaround time and ease-of-use benefits via native integration with Verdi®, VC Formal™, VC Execution Manager, and VC Verification IP so that customers have access to a comprehensive planning, coverage, and execution management native integration to target high-growth application markets.

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Disclosure: “Technical Computing” or “Technical Computing Workloads” as defined by AMD can include electronic design automation, computational fluid dynamics, finite element analysis, seismic tomography, weather forecasting, quantum mechanics, climate research, molecular modeling, or similar workloads. GD-204. AMD, the AMD arrow logo, EPYC, AMD 3D V-Cache, and combinations thereof are trademarks of Advanced Micro Devices, Inc.


[i] EPYC-026: Based on calculated areal density and based on bump pitch between AMD hybrid bond AMD 3D V-Cache.

[ii] MLNX-12: EPYC™ 7003 Processors with AMD 3D V-Cache have 768MB of L3 Cache, while EPYC 7003 processors without AMD 3D V-Cache have up to 256MB.

[iii] Processor compatibility with EPYC 7003 powered platforms may require a BIOS update.

[iv] MLNX-001A: EDA RTL Simulation comparison based on AMD internal testing completed on 9/20/2021 measuring the average time to complete a test case simulation. Comparing: 1x 16C EPYC™ 7373X with AMD 3D V-Cache Technology versus 1x 16C AMD EPYC™ 73F3 on the same AMD “Daytona” reference platform. Results may vary based on factors including silicon version, hardware and software configuration, and driver versions.