New Horizons for Chip Design

Archive for 2022

A Year in Review: A Recap of Key Technology Advances and Adventures in 2022

We recap 2022 at Synopsys, including cloud-based chip design tools, machine learning and AI-powered EDA solutions, multi-die systems, and secure interface IP.

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Posted in Artificial Intelligence, Cloud, EDA, HPC, Inside Synopsys, IP, Multi-Die Systems, Photonics


What You Need to Know About Reliability, Availability, and Serviceability in High-Performance Computing

Explore the key components of high-performance computing and learn how to design reliability, availability, and serviceability (RAS) into HPC clusters & systems.

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Posted in EDA, HPC, IP


4 Ways that Digital Techniques Can Speed Up Memory Design and Verification

We share the four ways digitizing memory chip design & verification saves time, and explore key chip design & verification tools for advanced memory devices.

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Posted in EDA


What It Means for an IP Vendor to Offer ASIC-Like Services

Explore what it means for semiconductor IP companies to offer ASIC-like chip design services and learn how turnkey IP solutions ease the SoC design flow.

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Posted in IP


How the Electronics Industry Can Shape a More Sustainable, Energy-Efficient World

We explore hyperscale datacenters & internet traffic’s impact on climate change and discuss how energy-efficient system design shapes a sustainable future.

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Posted in EDA, IP, Power


Why Now Is the Time to Address Quantum Computing’s Impact on Cryptography

Explore quantum computing’s impact on cryptography and learn how to prepare SoC designs for post-quantum computing and evolving cryptographic standards.

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Posted in Application Security, Cryptography, IP, Quantum Computing, Security


How Software-Defined Vehicles Expand the Automotive Revenue Stream

By Chris Clark, Senior Manager, Synopsys Automotive Group

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Posted in Automotive


What’s Driving the World’s First Analog and Mixed-Signal Emulation Technology?

Learn how analog and mixed-signal (AMS) verification technology, which we developed as part of DARPA’s POSH and ERI programs, emulates analog designs.

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Posted in Aerospace and Government, Application Security, Security, Verification


How to Speed Up Simulation Coverage Closure with Formal Verification Tools

We explore how formal verification tools synergize with simulation technology to accelerate coverage closure in the SoC design and verification process.

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Posted in Product Spotlight, Verification


Synopsys Joins IFS Alliance for Development of Secure Microelectronics for U.S. DoD

We’re joining Intel Foundry Services’ USMAG (United States Military, Aerospace and Government) Alliance to help bolster US semiconductor design & manufacturing.

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Posted in Aerospace and Government, EDA, IP