Sharpen Your Silicon Design Expertise at Synopsys Events this Fall

By Editorial Team

Fall is a great time for silicon design professionals to sharpen the saw and attain new skills and knowledge in the journey towards building a world of Smart Everything. That’s why over the next month, we have carefully curated several opportunities to share practical knowledge that will help you hit your power, performance, and area (PPA) targets and stay up to date on the latest industry trends.  

The series of events include a full, innovation-enabling curriculum. You’ll not only hear feature presentations from Synopsys and the wider electronic design industry, but you will have opportunities to connect and network with peer groups. You can even ask questions of the experts about your unique design challenges. We are hosting these opportunities virtually, making it easier for you to gain access to a wealth of knowledge while staying COVID safe. We hope you’ll find the experience engaging, exciting, and educational.  

Our fall events cover in-depth knowledge across three areas: 

• Synopsys DesignWare® ARC® Processor IP  
• Verification  
• Digital Design Technology  

Here’s a snapshot of what’s coming your way soon: 

ARC Processor Virtual Summit

September 21-22, 2021 

The ARC Processor Virtual Summit will deliver all the practical knowledge you need to meet your unique PPA requirements. At this event, you and your chip and system software developer peers will learn about the latest trends in processor IP. The summit includes a special keynote, TinyML and Efficient Deep Learning from Song Han, assistant professor of EECS at MIT. Han will teach TinyML techniques to help you address AI’s extraordinary requirements for data, computation, and power in a way that will make your designs greener, faster, more efficient, and sustainable.  

Here are a few highlights from the speaker tracks. (See the full schedule.) 

• Automotive—Learn about real-world solutions for security, safety, and reliability 
• AIoT—Design-in power efficiency for all things AI and internet of things (IoT) 
• Enabling Technologies—Accelerate SoC and software performance while meeting PPA requirements 

Register today for the ARC Processor Virtual Summit! 

Verification Day 2021

September 28 – 29, 2021 

Learn about all things verification, including innovations, techniques, and methodologies to verify your SoC designs and accelerate verification closure at Verification Day 2021. Six presentation tracks guided by experts occur across two half-days, covering a breadth of topics. You will learn how to find and address the most complicated SoC bugs, to run high-performance simulation, and to dramatically increase performance while managing your power budget.  

Here are a few highlights from the speaker tracks: 

• Formal Verification—Find and fix design bugs early 
• Static Verification—Analyze your designs to get the construction, clock, and reset domain crossings right 
• Architecture to Software—Design your complex SoCs with our functionality-defining EDA software 
• Debug for Design and Verification—Examine and solve the most complicated debug problems 
• High-Performance Simulation VIP—Create high-quality designs through accelerated runtime and debug for timely coverage convergence 
• Low Power—Address power challenges with breakthrough performance for hardware and software power verification 

Register today for Verification Day 2021! 

Digital Design Technology Symposium

October 5, 2021 

If you are an SoC designer or manager in high-performance computing (HPC), 5G, mobile, automotive, or AI, the Digital Design Technology Symposium is for you. This virtual event tackles the most compelling design challenges of our time and highlights the latest in innovation across energy efficiency, security, functional safety, and other critically important topics for our age. You will learn how to improve your PPA, get to market faster, and improve your yields. Program highlights include recent advances in the Synopsys Fusion Design Platform™. 

Included in this event is a special 30-minute Q&A Meet the Technologists session where you can get answers to your burning digital design questions from Synopsys experts. 

Here are a few highlights from the speaker tracks: 

• ML/AI Acceleration and 3DIC Design—Learn about machine Learning- (ML-)/AI-enabled flows and 3DIC technology to take on the high-performance and heterogenous integration challenges of advanced HPC/hyperscale computing applications 
• Energy Efficient Design—Discover software-to-silicon solutions for energy-efficient design, analysis, and verification with a unified RTL-to-signoff power backbone 
• FuSa Automation—Learn why embedded FuSa functionality ensures a holistic design approach for safety, reliability, and security from beginning to end 
• HPC & Advanced Technology—Handle the rumors of Moore’s law’s demise, giga-sized designs, and advanced technologies beyond FinFET with ease from the tips and techniques covered in this track 
• Test Innovations—Implement complex DFT faster with higher quality test and increased silicon diagnosis accuracy 
• Silicon Lifecycle Management—Make silicon visible through ongoing intelligent analysis and measurement 

Register today for the Digital Design Technology Forum!  

Our Fall events are shaping up to be a memorable and enriching experience for chip and system designers and managers. We hope you’ll join us for one, two, or all three of our events to get and keep your design expertise edge.