By Editorial Team
A global semiconductor shortage that’s impacting the entire supply chain, the slowing down of Moore’s law, the pressing need to develop chips more quickly. Big problems require big, innovative solutions, something that our co-CEO and chairman Aart de Geus is fortunately very familiar with.
He recently sat down with some of the top journalists at The New York Times, Forbes, and Anandtech to share his opinion on the advanced innovation that is required to overcome these obstacles and push the semiconductor industry forward.
Before we begin to answer those big questions, it’s helpful to look at where the chip design industry originated and where it is now. While today it’s quite common to see chip design teams working at non-traditional chip companies, that wasn’t always the case.
Chip design software took off in the 1980s to help engineers streamline their work. What once was accomplished with hand-drawn transistors and components can now easily and quickly be done using software tools.
Enter Synopsys. Founded in 1986, we have continually evolved our software offerings and added to the kinds of customers who use them. For example, auto manufacturers now use Synopsys simulations to predict how future chips will work to write software for them in advance.
Synopsys continues to grow, which de Geus attributed to what at first seemed like a problem rather than a chance for advancement, when speaking with Don Clark of the New York Times. The problem?
“A slowdown in Moore’s law, industry shorthand for the perennial race to shrink chip circuitry so chips do more with less silicon. In response, some companies are using Synopsys tools to design entire systems and bundles of smaller chips that work like a single processor.”
de Geus continued this conversation with Marco Chiappetta of Forbes. The real problem, he alluded, isn’t only related to the number of transistors being put onto chips. There are other opportunities to advance systemic complexity in addition to the traditional Moore’s law advancements we are familiar with.
This is what de Geus calls the SysMoore Era. This era requires new tools and strategies to move the semiconductor industry forward at the pace necessary to address the growing needs of customers to make new products as “smart” as possible.
“With Classic Moore’s law, we saw an unbelievable push in scale complexity that finally made AI possible. Now every vertical market seeks to extract economic value from their data by making everything smart. This has created a pull on the semiconductor industry to deliver another 1000x to tackle the systemic complexity that ‘smart everything’ creates. But 1000x means overcoming levels of design complexity that far exceed human engineering capability and economic means today,” de Geus said.
It’s clear that AI tools are the key to game-changing disruption.
High-profile silicon design teams are already using tools like Synopsys DSO.ai, the world’s first autonomous AI tool set for chip design, to accelerate time to market with a better semiconductor placement than human designers can achieve.
For instance, across four design projects, Samsung used DSO.ai to reduce time to design optimization by 86%, from a month to days, using up to 80% fewer resources and often beating human-led design targets.
During de Geus’ discussion with Dr. Ian Cuttress of Anandtech, he described that every major semiconductor milestone (i.e., moving from 200mm to 300mm wafers, planar to FinFET transistors, or DUV to EUV) requires the entire industry to jump onboard and scale costs.
“The use of machine learning in chip design, for use at multiple abstraction layers, will become a benefit that companies will use as a result of the current economic situation – the need to have the most optimized silicon layout for the use case required.”
Ultimately, AI enables 100 different configurations overnight, rather than one every few days. This will revolutionize how computer chips are made in this decade.
If you’d like to hear more about de Geus’ thinking on this topic, register for Hot Chips 33 (August 22-24), where he will be presenting the keynote presentation, “Does Artificial Intelligence Require Artificial Architects?”
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