Cloud EDA Tools Fuel Semiconductor Design Innovation 

While applications as varied as payment processing, business process/collaboration, and big data analytics all rely on cloud computing technologies, the chip design industry has been slower to move to adoption. Until now, the realization of the true benefits for chip design in the cloud were, well, somewhat cloudy.

Today, it’s clear that innovative, cloud-oriented electronic design automation (EDA) solutions are just what a semiconductor industry that is defined by exacting quality requirements, demanding time-to-market targets, and sky-high costs needs to address these challenges—and to thrive. In this blog post, we’ll take a closer look at how utilizing the public cloud for semiconductor design and verification can help fuel innovation as the benefits of Moore’s law begin to wane.

This is the start of a series of posts that our cloud experts will share in the coming months. EDA in the cloud is clearly more than a trend; it is a way forward for an industry that is grappling with exploding computational needs along with a continued push to reduce cycle times for design and verification. In upcoming posts, our experts will examine various aspects of innovations at Synopsys to optimize cloud-based use models.

Faster Time to Results

As chips continue to become more complex and larger, chip design and verification resources are becoming a bottleneck in the face of increasing time-to-market pressures. At the same time, engineering workloads are growing, with engineers consistently managing more on their plates with fewer resources. Compared to running EDA solutions on an on-premises data center, utilizing the cloud opens up significantly more compute resources to accelerate fundamental chip design and verification processes. There’s also the benefit of elasticity—the ability to quickly scale up or down based on needs.

As an example, let’s consider library characterization, a highly parallelizable task that needs a huge amount of compute resources. Resource planning for library characterization has been notoriously difficult. Pre-cloud computing, for instance, chip design houses invested in their own high-performance data-center capacities for these workloads. But these systems would either be over- or under-utilized based on demand patterns or they’d require sequencing of workloads, causing delays. Cloud computing, on the other hand, can reduce turnaround time (TAT) of tasks such as library characterization from weeks down to days by providing on-demand access to as much compute resources as needed when needed. Amazon Web Services (AWS) customers, for example, have been able to scale their library characterization workloads to more than 120,000 parallel jobs thanks in part to a close collaboration between AWS and Synopsys.

Tasks that are characterized by burst usage periods are ideal for moving to the cloud. Without having to invest in CapEx-heavy infrastructure themselves, designers have the flexibility to tap into compute resources on the fly. If needed, they can also break up their compute-intensive problems into smaller pieces and use cloud-based, massively distributed processing and storage to tackle each piece, provided that the data is partition-friendly. Applications such as timing analysis and physical and functional verification scale very well when distributed. With formal verification, for instance, you can localize the design and perform the verification in independent parts.

Enhanced Quality of Results

To maintain high quality of results (QoR) for advanced-nodes designs, lower power designs with multiple power-domains, and designs that are pushing at reticle limits, verification efforts are exploding at all stages of the design flow. In the real world, when in-house compute resources are not limitless, a design manager is asked to do the impossible: trade off time to market and quality of results. With virtually “unlimited” resources, the cloud provides the heft to perform massive simulation, timing signoff, and physical verification tasks that would strain or crush on-premises compute resources.

Semiconductor design engineers can benefit from the compute resources available from EDA in the cloud solutions.

High Levels of Security and System Uptime

Some of the hesitancy in the semiconductor industry toward moving to the cloud relates to understandable concerns over security and system uptime. The adoption of modern cloud security and cloud-native processes and technologies helps to assure that EDA workloads will run on a secure, monitored cloud infrastructure. To this end, EDA vendors work closely with cloud security vendors to adapt their technologies to protect EDA workloads and prevent data leakage. Applying strong identity and access management capabilities helps to ensure that EDA tool user access is managed appropriately.

Cloud vendors typically operate under a shared responsibility model where security of the cloud (i.e., the data centers) is the vendor’s responsibility while security in the cloud is left to their customers, such as EDA vendors. The EDA industry should have a clear understanding of what this model entails. Are cloud vendors building in security from the ground up in their infrastructures and applications, as well as ensuring operational security? Are EDA vendors utilizing encryption and next-gen monitoring and troubleshooting tools that are adapted to cloud environments?

As for system uptime, cloud providers are building in plenty of redundancy to ensure high availability and resiliency of their compute resources, such as through high availability clusters. EDA applications can be run across such clusters for better reliability and uptime.