Posted by Editorial Team on December 9, 2020
By Editorial Team
Last year, IBM Research unveiled an ambitious program focused on improving AI hardware performance by 1000x within the next 10 years. The initiative gave birth to a new AI Hardware Center and IBM formed a collaborative team of key industry and academic partners to help drive the effort forward. At the recent IEEE CAS/EDS AI Compute Symposium, IBM provided an update on the progress of this unique approach to address the most pressing challenges in AI hardware design.
The list of participants in the IBM Research AI Hardware Center is an impressive assortment of ecosystem players from across the AI industry, and Synopsys is front and center in the continued collaboration that will drive innovation and progress in the AI hardware space. In a nutshell, the challenge is all about performance per watt. What that means is AI’s unprecedented demand for data, power, and system resources requires a new class of inherently energy-efficient AI hardware accelerators that will increase compute power by orders of magnitude, in hybrid cloud environments, without the demand for increased energy.
Our role in IBM’s overall mission to help spearhead the next generation of AI improvement by 2029 has received recognition from national technical publications. According to SemiWiki, “Giving the whole process a ‘turbo boost’ of 1,000X will quite likely change the course of history. This effort in general, and the Synopsys contributions in particular, are something to watch.”
IBM Research noted: “Going forward, Synopsys will serve as lead electronic design automation (EDA) partner for IBM’s AI Hardware Center, helping drive IBM’s vision of 1,000 times improvement in AI compute performance in the coming decade. We began collaborating last year and have already begun to achieve silicon verification and demonstrable performance improvements.”
Innovation at the research center headquartered in Albany, New York, is enabling next-generation chips and systems that support the high processing power and speed that AI requires with four focus areas: analog AI cores, digital AI cores, heterogeneous integration, and an AI technology testbed.
Our partnership with IBM falls into three main categories:
“The reason why this is very interesting for Synopsys is because it touches multiple aspects of the hardware ecosystem, because IBM doesn’t just build the core architecture, they have the entire journey going all the way from materials research all the way down to software,” Arun Venkatachar, vice president of AI and central engineering at Synopsys, told EE Times. “What excites us with the IBM [ecosystem] is the collaboration at all these different levels.”
Learning is a big part of our motivation for joining the ecosystem, since AI chips present many unique challenges for EDA tools, including scalability, power, and architectural exploration, along with the need to build new tools for aspects such as data path validation.
To realize our ambitious goal, innovation is needed in the entire stack — from devices, materials, and chip design to software and algorithms. With many types of partners working in the IBM Research AI Hardware Center, different pieces of the puzzle can come together in a full solution, rather than just one piece of technology.
One of these partners is Red Hat.
InsideHPC and The Silicon Review reported that Red Hat will collaborate with IBM’s AI hardware development stream to enable AI hardware accelerator deployment across hybrid cloud infrastructure: multi-cloud, private cloud, on-premise, and edge. These accelerators can be used to build neural network models for applications that perform AI tasks, including speech recognition, natural language processing, and computer vision.
“Working with Red Hat, Synopsys, and other partners, our advancements in AI hardware and hybrid cloud management software integration will enable models and methods that will forever change the way we solve problems,” Vice President of IBM Systems Research Mukesh Khare said.
Additionally, IBM and NY Creates are investing in a cleanroom on the SUNY Polytechnic Institute campus in Albany, New York. The purpose is to focus on advanced packaging, called “heterogeneous integration,” to improve memory proximity and interconnect capabilities.
We are confident that our breadth of experience and technology will continue to make an impact in this collaboration. Our combined skills and tools in IC design platforms, emulation and prototyping solutions, and IP that enables high-performance silicon chips and secure software applications are valuable contributions to the combined efforts.
With this expertise and set of tools, we are working with IBM to develop an Analog AI toolkit that will be available to startups, academics, students, and businesses. This toolkit will help users address the “von Neumann bottleneck,” where data gets stuck between computation and memory.
In an EE Times interview, Khare expressed that Synopsys, as the industry leader in EDA software, emulation, and IP enablement, provides a critical link to the goals of the research effort.
We will continue to play an integral role in accelerating AI performance and capabilities over the next decade. New partners like Red Hat that join the IBM AI Research Center will only increase the value of the work Synopsys is involved in and help edge AI capabilities closer to 1000x improvement over the next 10 years.
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In the era of Smart Everything—where devices are getting smarter and everything is connected—Synopsys technology is at the heart of innovations that are changing the way we live. Read on to get the latest look at trends in semiconductor chip design, verification, IP integration, and software security and quality. Learn about the ins and outs of electronic design automation from our industry-leading experts and how silicon and software are powering the automotive, artificial intelligence, 5G, cloud and IoT markets.