Posted by Robert Vamosi on October 26, 2017
On Wednesday, Synopsys announced a multi-year research and development contract with the U.S. Intelligence Advanced Research Projects Activity (IARPA) to advance EDA tool flows for Superconducting Electronics (SCE). Synopsys will collaborate with experts in the field of SCE as part of the IARPA SuperTools Program to develop a comprehensive set of tools that increase the scale, efficiency, and manufacturability of these designs. SCE has the potential to propel the electronics industry beyond CMOS, enabling a major leap in processing speeds and power efficiency.
“The goal of the SuperTools Program is to help make the same design and TCAD tools and quality libraries that drove the semiconductor industry’s growth available for the emerging superconductor industry,” said Dr. Mark Heiligman, manager of the IARPA SuperTools Program in a press release. “As a long-time leader in design and TCAD, and the largest EDA company, Synopsys is the ideal company to lead the development of this tool flow.”
A known by-product of any computation process is heat. This can slow the flow of electrons through the chip and introduce interference. By operating at super-low temperatures, as low as 10 degrees Kelvin, SCE will allow electrons to flow without resistance for faster processing of complex data with much less noise.
As part of the SuperTools Program, Synopsys will increase the scale, efficiency, and quality of SCE design. This is critical to realizing SCE potential in applications such as supercomputers, enabling them to operate at exascale speed, perform 1018 calculations per second, and use less power than today’s petascale machines. Today, supercomputers run at 20 petaflops and 10 megawatts. IARPA estimates that SCE operating in a cryogenic environment would allow a supercomputer to operate at 100 petaflops of performance for about 200 kilowatts.
Commercial EDA tools enabled for SCE can enable larger scale designs, higher quality, and broader adoption of SCE. Creating new circuit designs could make simple superconducting devices much cheaper to manufacture, and bring the promise of quantum computing sooner.
For example, Josephson junctions, which take advantage of a quantum phenomenon where a current can flow indefinitely across a device, today require sensitive lab equipment to detect the miniscule currents used. As a result, Josephson junctions are not yet suitable for data storage. SCE could make Josephson junctions practical to everyday use.
“For more than thirty years, Synopsys has developed EDA tools that have enabled the semiconductor industry to keep pace with semiconductor scaling and enabled Moore’s Law,” said Antun Domic, chief technology officer of Synopsys. “IARPA’s investment in superconducting technology, as evidenced by the C3 supercomputer and now SuperTools Programs, can help SCE evolve and become accessible for more designs. We look forward to helping our government and commercial customers take advantage of this technology as it evolves.”
In the era of Smart Everything—where devices are getting smarter and everything is connected—Synopsys technology is at the heart of innovations that are changing the way we live. Read on to get the latest look at trends in semiconductor chip design, verification, IP integration, and software security and quality. Learn about the ins and outs of electronic design automation from our industry-leading experts and how silicon and software are powering the automotive, artificial intelligence, 5G, cloud and IoT markets.