Richard has been talking about how long it’s been since he’s posted. I have to say, it’s been forever since I’ve posted a blog and I’ll need to work on that in 2019. Yes, I’m still alive and kicking and so much has happened since I’ve posted. More on that in another post.
At the PCI-SIG DevCon in June 2017 two announcements were made with regards to PCI Express specifications. The first is that the specification for PCIe 4.0 is now at version 0.9. The second and even more interesting announcement was of the new PCI Express 5.0 specification at the initial 0.3 version. With the PCI Express 5.0 announcement, the industry gets another doubling of speed from 16.0GT/s to 32GT/s per lane providing a bandwidth for a x16 (16 lanes) at about 128GB/s. The chart below provides a comparison for the different generations of PCIe rates and bandwidth.
Synopsys has a long history of working with ecosystem partners as part of the development process, especially when new versions of a specification are rolled out. The PCIe 4.0 specification has taken a long time, but that hasn’t slowed us down. If you remember from previous postings, some of our PCIe 4.0 demos include:
Ok, so the title reference might be a bit aged for many of our readers… You young-uns can check out this YouTube video for a hint. On the offhand chance that you missed the email from PCI-SIG, I’ll give a (PCI-SIG members-only of course) link directly in to the new 0.7 Draft of PCI Express 4.0: https://members.pcisig.com/wg/PCI-SIG/document/download/9977
“What’s this?!?!? A blog posting from Richard? Wasn’t he killed in a fiery camel-riding crash at the last PCI-SIG Israel event or something?”
The video at ARM TechCon of our 2nd PCIe Gen4 system got kind of lost in our end of the year, Thanksgiving, Christmas, New Years, End of the 1st Quarter rush. I know that my videos of PCIe won’t win any Oscars, but one wonders if someone is just hiding this masterpiece from the public eye. Ok, ok, it’s not a masterpiece, but I’m sure folks would like to see PCIe 4.0 in action. Just for fun, see if you can find my mistakes! There are at least 5!
Richard and I will be at PCI-SIG. For any of you that go to PCI-SIG, you know Richard will be doing several presentations, some for PCI-SIG and some for Synopsys, so you can find him walking around. For me, you’ll be able to find me in the sessions or at the Synopsys booth during the exhibit times. Catch us or stop by the booth and tell us about your latest PCIe projects. Both of us love to hear about the latest ways you’re using PCI Express in your designs. We also like it when you tell us you read the blog.
Well, we’re back from the PCI-SIG Developers Conference Israel 2015 and by now, between Scott and me we might make up one coherent person! (I know, given the blog frequency lately, you probably thought Scott and I had been kidnapped by aliens. I have no comment on that beyond “We’re back!“) This was the third Israel DevCon and as always I was pleased with the fantastic turnout. I mean, it’s a hardship going to Israel, but somehow we tough it out…
All right, no monkeying around this year, I promise (mostly) not to make any IDFvs IDF jokes – mainly because nobody even tried to answer last year’s quiz question. (On that note, Scott and I had a quiz internally this spring for our field folks to see if they’d been following the blog… Let’s just say the results were NOT gratifying!)