Express Yourself

Author Archive
Richard Solomon
rsolomon


Posts by Richard Solomon:

 

The Goodies at Last: What’s new in PCIe 4.0

So back in what seems like another lifetime, I said “The official PCI Express Base Specification Revision 4.0 final specification has been released – get it here: https://members.pcisig.com/wg/PCI-SIG/document/10912?downloadRevision=active

Continue Reading...

Posted in Uncategorized

 

Shortest Blog Post Ever…

…at least for Richard 🙂

Continue Reading...

Posted in PCI Express

 

Flashback to Basics Friday! What’s in a name…

“What’s in a name? that which we call a rose by any other word would smell as sweet” How many times do you get Shakespeare in a tech blog?  Well, here at ExpressYourself we like to cover all the bases 🙂  (I’m fond of announcing that “I have a poetic license and I’m not afraid to use it!”  much to the chagrin of my children I’m sure.)

Continue Reading...

Posted in PCI Express

 

Proper Preparation Prevents Poor PCIe Performance

Ok, so maybe that’s not the 6P’s (or 5P’s or 7P’s depending on where you first learned it) most folks may be familiar with, but it seemed pretty proper for a performance posting…plus someone said Solomon is a serious sucker for alliterations!  (Hey, now that I can no longer make IDF jokes, you just KNEW I was going to have to find another outlet!)

Continue Reading...

Posted in PCI Express

 

Beware the Ides of March!

…or in my case, I think it’s “Where have you been until the Ides of March????”

Continue Reading...

Posted in PCI Express, Uncategorized

 

The New Spec Draft’s Here, The New Spec Draft’s Here!

Ok, so the title reference might be a bit aged for many of our readers… You young-uns can check out this YouTube video for a hint.  On the offhand chance that you missed the email from PCI-SIG, I’ll give a (PCI-SIG members-only of course) link directly in to the new 0.7 Draft of PCI Express 4.0: https://members.pcisig.com/wg/PCI-SIG/document/download/9977

Continue Reading...

Posted in PCI Express, PCI-SIG, Specification

 

Flashback to Basics Friday! Bifurcation…

Pop quiz!  Which section of the PCI Express Base Specification covers bifurcation?  Here, I’ll even wait while you look….

Continue Reading...

Posted in Architecture, PCI Express, PCI-SIG

 

Real Reality

Scott and I are out at IDF (Intel Developer Forum – not the Tavor-wielding IDF) this week, where the keynote yesterday was all about Virtual Reality, Augmented Reality, and Merged Reality …. oddly not much was said about plain old real reality.  If you missed us last week at Flash Memory Summit (FMS) please stop by Booth #230 and say “Hi”.  Heck, even if you didn’t miss us, come by anyway!  Speaking of FMS, I should first give you an…. FMS AAR (After Action Report) I apologize for not posting sooner, but after spending so much time last week chanting under my breath my favorite old Polish folk-saying (“Not my circus, not my monkeys!”) I was struggling with exactly what to post about FMS.  Suffice it to say that there were a number of logistical “challenges” with the show itself – culminating in a no-show of the moderator for the PCIe/NVMe session.  However, I did have a good turnout of 50-60 folks for my session on using PCIe 4.0 in SSDs.  I really appreciated everyone’s patience as the speakers worked out our own lineup and introductions (and no, for the record, despite how I introduced him, Debendra didn’t *actually* invent a banana peeler).  There was definitely a lot of interest in PCIe 4.0 from SSD folks and that was evident in our booth traffic as well.  This shouldn’t be surprising to anyone given new technologies in non-volatile media and the relative ease of aggregating NAND (or other) chips to get extremely high bandwidth, not to mention that most common PCIe SSD form-factors are limited to 4 lanes.  (Remember that SFF-8639, now sometimes called U.2, and the newish M.2 form-factor both top out at PCIe x4 configurations so their only real choice for more bandwidth is higher signaling speed.)  Regardless of the hiccups, thanks for all those who stopped by – including some old friends and colleagues:

Continue Reading...

Posted in Architecture, General Protocol, PCI Express

 

Beer, Pizza, and PCI Express Pontification

Sorry this is so last-minute, but any of you who are at Flash Memory Summit this week, please stop by Tuesday night for “Beer, Pizza and Chat with the Experts” (7pm-8:30pm) where I’ll have a table on SSD Interfaces.  Of course this will be completely neutral 😀

Continue Reading...

Posted in Uncategorized

 

Come run with the big dogs at PCI-SIG Devcon 2016!

Hopefully all of you have made plans to attend this year’s PCI-SIG Developers Conference (aka Devcon) next week in Santa Clara.  This is THE event to learn about PCI Express technology, and network with your fellow PCIe ecosystem members.  Of course Synopsys will be there, both on the exhibition hall floor and in the Member Implementation tracks.  Come listen to the big dogs from Synopsys R&D teach you (and our competitors) about two important topics.  First, come by Track 3 on Tuesday at  3:30pm to hear how we got our DesignWare Root Port IP for PCI Express on the PCI-SIG Integrator’s List as the first *EVER* from an IP provider!  Don’t miss the 10:30am Wednesday morning session (also in Track 3) on PCI Express in automotive applications.  Yes, it’s true, I’m taking a bit of a rest on this one and “only” presenting PCI-SIG sessions this time, but the other Synopsys presenters will keep you informed, even if they’re not as funny as I think I am 😀

Continue Reading...

Posted in Architecture, PCI Express, PCI-SIG, Uncategorized