Posted by Richard Solomon on March 30, 2018
I wanted to title this “Upstream, downstream, in my lady’s chamber” in honor of the old nursery rhyme “Goosey, goosey, gander” – but after reading what Wikipedia has to say about the nursery rhyme it didn’t seem quite as childlike as I remembered… I also thought that putting “in my lady’s chamber” in a blog title was perhaps not going to show up on the kinds of google searches I’d actually hope for! I guess it’s all a matter of perspective.
Actually “perspective” is the key (in my opinion) to understanding PCIe’s upstream/downstream naming. I admit that when I first encountered PCI Express I was confused – “What’s this upstream component and why does it have a downstream port? I thought I was the endpoint, now I’m the downstream component? Holy heck, and I’ve got an upstream port?!??!”
Let’s leave switches out of the discussion for just a moment and consider a “typical” system where we’ve got an endpoint device (let’s say it’s a graphics adapter) connected directly to a root complex (let’s say it’s an x86 workstation computer). Some of the confusion probably arises because *devices* can be upstream or downstream and their *ports* can also be upstream or downstream.
The key to decoding this naming is that “stream-ness” is relative to the root complex: up is towards the root, down is away from the root. For devices this is easy as it’s just their “position” in a logical hierarchy with the root complex at the source of the tree. So in our example, the workstation houses a root complex which is the upstream device – as you can’t get any closer to the root complex than, well, the root complex itself. The graphics adapter is the downstream device as it connects to the root.
For me it’s easiest to picture a little gremlin standing on the root complex (workstation) and looking at the connected device (endpoint/graphics adapter), he is looking away from the root complex (defined as down) therefore the endpoint is downstream from the root complex (a downstream device). Likewise if our gremlin stands on the endpoint and looks at the connected device he is looking towards the root complex (defined as up) and thus the root complex is upstream (an upstream device).
To understand the port naming, just consider which *direction* the gremlin is looking. At the root complex, he’s looking downstream at the endpoint so he’s standing on a downstream port. At the endpoint, he’s looking upstream at the root complex, so he’s standing on an upstream port.
Clear as mud?
“What about switches then?” you might ask. Well, a PCIe switch by definition has an upstream port which connects closer to the root complex, and one or more downstream ports which connect devices further away from the root complex. If we extend our example a bit and say there are two graphics adapters connected to our workstation, with a PCIe switch connected in between, then when our gremlin stands on the root complex’s downstream port and looks at the connected device he sees the switch’s upstream port – so to him the switch is a downstream device. If he hops onto one of the switch downstream ports, he’s still looking away from the root complex and so the graphics adapter he sees is a downstream device. For that matter, the port he’s standing on is a downstream port because he’s looking away from the root complex (down) when he looks at the connected device. The graphics adapter is still a downstream device and it still has an upstream port (since our gremlin standing on it is still looking up towards the root complex).
So, as I said in the beginning, it’s really all a matter of perspective. Sure, I could have titled this “Flashback to Basics Friday! Perspective…” but would that have been anywhere near as interesting a title? I think not, but as always, leave a comment and tell me what you think. Make sure you’re subscribed to ExpressYourself either by clicking here for RSS or here for email or I’ll have to send the gremlin after you!
P.S. Yes, I know I’m a lousy artist! Feel free to make me some better graphics and I’ll happily publish them – earning you fame and fortune! Well, maybe not much fortune – perhaps some swag. (Quality of swag may be proportional to quality of graphics provided – an animated gremlin explaining everything would be awesome!)
I’ve been involved in the development of PCI chips dating back to the NCR 53C810 and pre-1.0 versions of the PCI spec so have definitely lived the evolution of PCI Express and PCI since the very beginning! Over the years I have worked on variations of PCI, eventually moving on to architecting and leading the development of the PCI Express and PCI-X interface cores used in LSI’s line of storage RAID controller chips. For the last ten plus years I've also had the honor of serving on the PCI-SIG Board of Directors and holding a variety of officer positions. I am still involved in PCI-SIG workgroups and I present at many PCI-SIG events around the world. Back before the dawn of PCI, I received my B.S.E.E. from Rice University, and hold over two dozen U.S. Patents, many of which relate to PCI technology.