Posted by Richard Solomon on August 18, 2015
When did THAT happen? The last thing I remember clearly was PCI-SIG Developer’s Conference – and that was June… Next I know Scott’s banging on the door of my hotel room and yelling something about IDF????? Apparently I’m in San Francisco (which is odd, because I’d swear that last week I was in Milpitas as some of you know), and there were gray Synopsys shirts hanging in my closet so I threw one on and ran over to Moscone to help set up our booth….
What’s that you ask?
“Isn’t that the ‘Gen4’ demo there on the left?”
Why yes, yes it is 😀
Those of you who might have attended a certain large chip maker’s recent briefing might have heard some waffling that sounded suspiciously like FUD… so come by booth #651 (sorry, the lights washed it out in the photo) and get the straight scoop on PCI Express 4.0 and see actual PCIe hardware running the 4.0 Draft protocol at 16GT/s!
Feel free to harass me at the same time about not keeping up with the blog and how Scott managed to get in 3 postings before I got to 1 🙁 Sorry for the short post – it’s 10:45 Pacific and the floor opens in 15 minutes, so come on down…and stay tuned for updates….
I’ve been involved in the development of PCI chips dating back to the NCR 53C810 and pre-1.0 versions of the PCI spec so have definitely lived the evolution of PCI Express and PCI since the very beginning! Over the years I have worked on variations of PCI, eventually moving on to architecting and leading the development of the PCI Express and PCI-X interface cores used in LSI’s line of storage RAID controller chips. For the last ten plus years I've also had the honor of serving on the PCI-SIG Board of Directors and holding a variety of officer positions. I am still involved in PCI-SIG workgroups and I present at many PCI-SIG events around the world. Back before the dawn of PCI, I received my B.S.E.E. from Rice University, and hold over two dozen U.S. Patents, many of which relate to PCI technology.