Posted by Scott Knowlton on May 22, 2014
This seems strange to ask you, but “are you ready to start designing with PCI Express 4.0?” Why does it seem strange to ask? It’s because PCI Express 4.0 was announced in November 2011 and the 0.3 version of the specification isn’t out yet (although I hear that it could happen in a few days). My very first blog posting was about PCI Express 4.0 on November 4th, 2012 “World Domination: PCI Express (4), Dr. Evil (0)”. With so much time passing, why would I write about it today and ask if you’re ready to start designing with PCI Express 4.0? Here is why: Synopsys announced our PCI Express 4.0 solution today. You can read all about it via our press release “Synopsys Unveils Industry’s First Complete PCI Express 4.0 solution”. We are providing digital controllers, PHYs and Verification IP that all support the new 16GT/s speeds in the PCI Express 4.0 specification, so you can include PCI Express 4.0 into your latest designs. Here are the highlights from the press release:
PCI Express 4.0 doubles the throughput over the previous 8GT/s supported PCI Express 3.0. A comparison chart between the different speeds supported in the PCI Express specification is shown below:
PCI Express 4.0 is backwards compatible with prior generations. While the PCIe 4.0 specification is still in development, the expectation for transitioning from PCIe 3.0 to PCIe 4.0 should be fairly straight forward, much like the PCIe 1.0 to PCIe 2.0 transition verses the PCIe 2.0 to PCIe 3.0 transition.
For those of you that already use the DesignWare PCI Express solution, you will find this an easy upgrade as it is built on top of the same architecture and keeping the interfaces and such the same. For those of you not using the our controller, come join the family of PCI Express users that use the solution used by more than 880 users.
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I’ve been involved in the development of PCI chips dating back to the NCR 53C810 and pre-1.0 versions of the PCI spec so have definitely lived the evolution of PCI Express and PCI since the very beginning! Over the years I have worked on variations of PCI, eventually moving on to architecting and leading the development of the PCI Express and PCI-X interface cores used in LSI’s line of storage RAID controller chips. For the last ten plus years I've also had the honor of serving on the PCI-SIG Board of Directors and holding a variety of officer positions. I am still involved in PCI-SIG workgroups and I present at many PCI-SIG events around the world. Back before the dawn of PCI, I received my B.S.E.E. from Rice University, and hold over two dozen U.S. Patents, many of which relate to PCI technology.