Now that my kids are back to school, things are calming down slightly. Well, ok, the chaos is shifting gears 🙂 I’m still recovering from IDF last week, and I owe you all a blog post about that, but I’ve been remiss in advising you of how you too can get “back to school” … with an upcoming Webinar on challenges you’ll face in PCI Express 4.0 design.

Posted in Architecture, General Protocol, PCI Express, PCI-SIG

Synopsys, Scott, and Richard at IDF (Booth 655, Sep 9-11)

All right, no monkeying around this year, I promise (mostly) not to make any IDFvs IDF jokes – mainly because nobody even tried to answer last year’s quiz question. (On that note, Scott and I had a quiz internally this spring for our field folks to see if they’d been following the blog… Let’s just say the results were NOT gratifying!)

Posted in Architecture, Market Adoption, PCI Express, Specification

Summer Blockbusters Featuring Gen4, Gen3 and M-PCIe

For those of you that didn’t get to see our demos at PCI-SIG DevCon, you can view these new summer blockbusters featuring the latest videos with your favorite Synopsys PCI Express Controller and PHY IP. These videos are rated two thumbs up by Scott and Richard!

Posted in Architecture, General Protocol, M-PCIe, M-PHY, PCI Express, PCI-SIG, PHY

Catching up – PCI-SIG Developers Conference 2014

Wow, the last weeks have been just crazy crazy! Luckily Scott’s been on top of the blog for the last month or so, or you might have thought we’d dropped off the face of the earth. Actually, May was very hectic for me – I don’t think I had more than 36 hours straight at home for the last few weeks of the month. Scott and I visited some customers out in Texas, then there was the semi-annual Synopsys FAE training, and finally (lo-and-behold) I took an actual vacation! Squeezing in a week in Europe between FAE training and Devcon seemed like a good idea when I scheduled it, but Murphy’s Law came into play on my return. My 12-hour layover at home turned into arriving the next morning, changing suitcases and catching a late afternoon flight 4hrs after I arrived! All for you dear readers, all so I could make it to the Developers Conference.

Posted in Market Adoption, PCI Express, PCI-SIG, Specification

See the Industry’s Most Complete PCI Express Solutions at PCI-SIG

For those of you coming to the PCI-SIG DevCon, you should stop by and visit the Synopsys booth (Booth 8 ) to learn about our high-quality, silicon-proven DesignWare IP portfolio for PCI Express, which includes controllers, PHYs and verification IP. See how our robust IP development methodology, extensive investment in quality, IP prototyping, software development, and comprehensive technical support enables designers to accelerate time-to-market and reduce integration risk.

Posted in Architecture, PCI Express, PCI-SIG, Specification, Uncategorized

Interested in Accelerating Your Next SoC Design?

As I put the final touches on preparations for the PCI-SIG Developer’s Conference and getting ready to show you multiple demos for our recently announced support for PCI Express 4.0 there are exciting developments happening from Synopsys that will make your next SoC design easier. Let’s face it. Your goal is to build a product and there are multiple steps that have to be completed before the product is done while doing this under increasingly shorter time to market goals. This means that we are trying to do as many tasks as possible in parallel and they need to stay coordinated. Today, Synopsys announced our new IP Accelerated Initiative that focuses on enabling designers to incorporate IP into your SoC design flow at multiple levels of the design process by using a coordinated solution between IP prototyping kits, software development kits and customized IP subsystems.

Posted in Applications, General Protocol, Market Adoption, PCI Express, PCI-SIG, PHY

Ready to Start Your PCI Express 4.0 Designs?

This seems strange to ask you, but “are you ready to start designing with PCI Express 4.0?” Why does it seem strange to ask? It’s because PCI Express 4.0 was announced in November 2011 and the 0.3 version of the specification isn’t out yet (although I hear that it could happen in a few days). My very first blog posting was about PCI Express 4.0 on November 4th, 2012 “World Domination: PCI Express (4), Dr. Evil (0)”. With so much time passing, why would I write about it today and ask if you’re ready to start designing with PCI Express 4.0? Here is why: Synopsys announced our PCI Express 4.0 solution today. You can read all about it via our press release “Synopsys Unveils Industry’s First Complete PCI Express 4.0 solution”. We are providing digital controllers, PHYs and Verification IP that all support the new 16GT/s speeds in the PCI Express 4.0 specification, so you can include PCI Express 4.0 into your latest designs. Here are the highlights from the press release:

Posted in Architecture, General Protocol, PCI Express, PCI-SIG, PHY, Specification

Avoiding Taxes

Sorry, I’ve been very delinquent in posting – it’s been a busy month! As you might guess from the title, one of the things keeping me busy was doing last year’s income taxes. (Non-USA folks might not know the dread with which Americans approach April 15th each year – the day our income taxes are due.) Changing employers of course complicated things a little (apparently I managed to overpay Social Security) and I was lucky enough to have some nice gains in the stock market. Unfortunately I had some nice gains in the stock market so I went from filling out the “send us most of your money” tax forms to the “send us all your money” tax forms. A time-honored American tradition is finding legal ways to manipulate money so as to pay less in taxes – apparently I’m not very good at this!

Posted in Architecture, Market Adoption, PCI Express, PCI-SIG, Specification

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About

This blog is all about PCI Express: the wonderful ways that it enhances the products around you, the challenges designers face in implementation, and how the specification is evolving to make PCIe Express an even more useful protocol. I'll also examine how the other specifications, such as NVM Express, SATA Express and SCSI-Over-PCI Express (SOP) are leveraging PCI Express. If there is a topic that is of interest to you, feel free to "Express Yourself" by offering your insights on this blog.

About the Author

Scott Knowlton
I started out my career as a chip designer in a variety of industries and it’s likely that a few, of the more than 30 designs I’ve been responsible for, are still floating around somewhere in outer space. My IP career started at Synopsys in 1997 and over the last 15 years, I have seen tremendous changes in the semiconductor industry’s perception and adoption of IP. I started working on PCI Express in 2003 when Synopsys was getting ready to launch our first PCI Express IP solution. Since then, I have been managing the DesignWare PCI Express IP product line through all of the changes in the specification and the industry as it moves towards becoming the de-facto interconnect standard. I received a B.S.E.E from the University of Michigan (M Go Blue!), am an avid red wine drinker (love California reds) and use English as a second language when my fluency in sarcasm just doesn’t get the job done.

Richard Solomon

I’ve been involved in the development of PCI chips dating back to the NCR 53C810 and pre-1.0 versions of the PCI spec so have definitely lived the evolution of PCI Express and PCI since the very beginning! Over the years I have worked on variations of PCI, eventually moving on to architecting and leading the development of the PCI Express and PCI-X interface cores used in LSI’s line of storage RAID controller chips. For the last ten plus years I've also had the honor of serving on the PCI-SIG Board of Directors and holding a variety of officer positions. I am still involved in PCI-SIG workgroups and I present at many PCI-SIG events around the world. Back before the dawn of PCI, I received my B.S.E.E. from Rice University, and hold over two dozen U.S. Patents, many of which relate to PCI technology.

‘Twas the night before Christmas

Trick or Treat… PCI Express 3.1 Released!

Back to school and PCIe 4.0 “secrets”

Synopsys, Scott, and Richard at IDF (Booth 655, Sep 9-11)

Summer Blockbusters Featuring Gen4, Gen3 and M-PCIe

Catching up – PCI-SIG Developers Conference 2014

See the Industry’s Most Complete PCI Express Solutions at PCI-SIG

Interested in Accelerating Your Next SoC Design?

Ready to Start Your PCI Express 4.0 Designs?

Avoiding Taxes

Legal

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