Posted by Scott Knowlton on October 17, 2013
I’m in Japan this week and Taiwan next week for the PCI-SIG conference and we are showing demos for PCIe Gen3 PHYs and our M-PCIe controller with Gear3 MIPI M-PHYs. As part of our demo, we also showed Teledyne LeCroy‘s TeleScan PE Utility, which has just been updated to support M-PCIe and this is the first public appearance of the changes. The TeleScan PE utility allows a user to quickly look at the configuration status of a PCIe or M-PCIe interface, which is very useful to developers looking to see what’s going on inside of their chip. Using Synopsys’ “Industry’s First GEAR3 M-PCIe and M-PHY Demo”, we have taken a screen shot using the TeleScan PE Utility and it is shown below:
Notice the tool has recognized our M-PCIe device and has read the capabilities and the current status.
The tool has been very useful to use in showing what’s going on in our core and demo HW. So, why is this important to us and to you? As new technologies like M-PCIe are rolling out into the industry, it is important to see different companies in the ecosystem working together as another proof that their products are interoperable and that the protocol is gaining momentum. Of course, this lowers the risk for anyone that wants to use products that can already show interoperability. Keep an eye out for additional M-PCIe products as they are rolled out…as the title says, “Men at Work”.
Synopsys is providing IP for the M-PCIe interface including controllers and PHYs. For more information on Synopsys’ M-PCIe solutions, please visit the Synopsys web site.
The LeCroy Telescan PE Utility supports PCIe 1/2/3 and M-PCIe. They just announced support for M-PCIe today and you can read their announcement. If you’re interested on the features and capabilities of the Teledyne LeCroy Telescan PE Utility, you can get more information here. Oh, and did I mention the best part of this utility? It’s free! Click here to download.
As always, we’d love to hear from you on the value of these posts and any ideas that you’d like for Richard or I to talk about.
I’ve been involved in the development of PCI chips dating back to the NCR 53C810 and pre-1.0 versions of the PCI spec so have definitely lived the evolution of PCI Express and PCI since the very beginning! Over the years I have worked on variations of PCI, eventually moving on to architecting and leading the development of the PCI Express and PCI-X interface cores used in LSI’s line of storage RAID controller chips. For the last ten plus years I've also had the honor of serving on the PCI-SIG Board of Directors and holding a variety of officer positions. I am still involved in PCI-SIG workgroups and I present at many PCI-SIG events around the world. Back before the dawn of PCI, I received my B.S.E.E. from Rice University, and hold over two dozen U.S. Patents, many of which relate to PCI technology.