Express Yourself
Ok, so maybe that’s not the 6P’s (or 5P’s or 7P’s depending on where you first learned it) most folks may be familiar with, but it seemed pretty proper for a performance posting…plus someone said Solomon is a serious sucker for alliterations! (Hey, now that I can no longer make IDF jokes, you just KNEW […]
…or in my case, I think it’s “Where have you been until the Ides of March????” This was going to be a New Years posting….then it was going to be a Lunar (“Chinese”) New Years posting…then I thought “Wow, how did it get to be March already?!?!?” Suddenly, we’re a month away from US income […]
Ok, so the title reference might be a bit aged for many of our readers… You young-uns can check out this YouTube video for a hint. On the offhand chance that you missed the email from PCI-SIG, I’ll give a (PCI-SIG members-only of course) link directly in to the new 0.7 Draft of PCI Express […]
Pop quiz! Which section of the PCI Express Base Specification covers bifurcation? Here, I’ll even wait while you look…. Did you give up yet? Good. First of all, you won’t find the word “bifurcation” in the spec at all! The term is commonly understood to mean splitting a set of PCI Express lanes into multiple links […]
Scott and I are out at IDF (Intel Developer Forum – not the Tavor-wielding IDF) this week, where the keynote yesterday was all about Virtual Reality, Augmented Reality, and Merged Reality …. oddly not much was said about plain old real reality. If you missed us last week at Flash Memory Summit (FMS) please stop by […]
Sorry this is so last-minute, but any of you who are at Flash Memory Summit this week, please stop by Tuesday night for “Beer, Pizza and Chat with the Experts” (7pm-8:30pm) where I’ll have a table on SSD Interfaces. Of course this will be completely neutral 😀 Also on Wednesday I’ll have a short session […]
Hopefully all of you have made plans to attend this year’s PCI-SIG Developers Conference (aka Devcon) next week in Santa Clara. This is THE event to learn about PCI Express technology, and network with your fellow PCIe ecosystem members. Of course Synopsys will be there, both on the exhibition hall floor and in the Member […]
Full disclosure: this is NOT a posting about PCI Express ordering rules, though that’s a great topic which I’ll use for a future posting. This began life as a SNUG China posting, but what actually struck me more was a small incident which happened on my trip to China last week. Knowing that I was […]
I’ve been thinking for a while (yes, that explains the burning smell) that we should be covering some of the basics of PCI Express here at ExpressYourself in addition to “just” the new stuff. After reading today’s posting, please let me know in the comments whether this is a good idea or not… One of […]
“What’s this?!?!? A blog posting from Richard? Wasn’t he killed in a fiery camel-riding crash at the last PCI-SIG Israel event or something?” Sigh. I know, I know, I’m waaaaaaaaaaaaaaaay overdue for paying attention to the blog. Even the Synopsys folks who maintain our blog infrastructure thought I’d fallen off the face of the earth. Luckily […]
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About
About the Author
Scott KnowltonI started out my career as a chip designer in a variety of industries and it’s likely that a few, of the more than 30 designs I’ve been responsible for, are still floating around somewhere in outer space. My IP career started at Synopsys in 1997 and over the last 15 years, I have seen tremendous changes in the semiconductor industry’s perception and adoption of IP. I started working on PCI Express in 2003 when Synopsys was getting ready to launch our first PCI Express IP solution. Since then, I have been managing the DesignWare PCI Express IP product line through all of the changes in the specification and the industry as it moves towards becoming the de-facto interconnect standard.
I received a B.S.E.E from the University of Michigan (M Go Blue!), am an avid red wine drinker (love California reds) and use English as a second language when my fluency in sarcasm just doesn’t get the job done.
Richard Solomon
I’ve been involved in the development of PCI chips dating back to the NCR 53C810 and pre-1.0 versions of the PCI spec so have definitely lived the evolution of PCI Express and PCI since the very beginning! Over the years I have worked on variations of PCI, eventually moving on to architecting and leading the development of the PCI Express and PCI-X interface cores used in LSI’s line of storage RAID controller chips. For the last ten plus years I've also had the honor of serving on the PCI-SIG Board of Directors and holding a variety of officer positions. I am still involved in PCI-SIG workgroups and I present at many PCI-SIG events around the world. Back before the dawn of PCI, I received my B.S.E.E. from Rice University, and hold over two dozen U.S. Patents, many of which relate to PCI technology.
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