Custom Compiler Layout Assistants: Streamlining Design Processes

Synopsys Editorial Staff

May 03, 2016 / 1 min read

 The routing task is one that absolutely screams out for an automated approach. However, past efforts have required a great deal of text-based constraints to get anything near to what you really want.

The routing assistant is a perfect combination of user guidance and automation. It’s a visually assisted approach that allows the layout engineer to simply click on the starting point of the route and then drag the cursor in the direction they want the routing to follow. As the cursor moves along, under the hood the routing engine searches for connections that it can make. When it finds a connection it automatically taps to the pin without the layout engineer having to enter a mouse click. The user simply guides the router with the mouse and it fills in the routing details automatically.

The router is especially good for routing up arrays of FinFETs. FinFET designs have masses of identical common connections and the router understands that. So, as it routes it clones the connections, it has just completed to other parts of the layout. As connections are made in one part of the layout you see them also appear in other areas of the layout that require an identical hook up.

Interactive routing with automatic cloning and pin-tapping

Figure 1: Interactive routing with automatic cloning and pin tapping.

Figure 1 shows the router connecting up the gates of an interdigitated fully matched differential pair. The yellow flightline shows the starting point of the route and the current cursor position. The router has automatically tapped to the pins and has cloned the routing to the devices in the rows below.

For FinFET based designs the router also ensures that all the routing adheres to the correct coloring rules and metal grids. The fact that you can see the routing appear in real time as you move the cursor, gives immediate feedback to the layout engineer as to the style of routing that is being generated and allows them to make changes on the fly. The router has some options for the style of connections you want to make, such as a fishbone style for routing in between rows where the connections can tap up or down to the pins but apart from that there are virtually no constraints to enter, no code to write and layout is done in minutes versus hours.

This powerful combination of user guidance and automatic routing really delivers on reclaiming the custom layout productivity loss that you incur when adopting a FinFET process.

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