“Say what??” my friend shot back when I asked him if he heard about the latest trend in coverage modeling called CDCM or Convergence Driven Coverage Modeling. I thoroughly enjoyed myself watching him scour the most obscure corners of his memory in search of something resembling my question. After all there weren’t too many coverage related topics he wasn’t aware of, let alone “the latest trend” in coverage models. Of course he had no chance to find anything as I had just made up the term to throw him off his usual cool. However, once I started explaining what I had in mind, he got really enthusiastic.
Unless you’ve completely isolated yourself from the wisdom of Verification and EDA pundits, you must have heard at some point that High Level Verification and High Level Synthesis are the way of the future. This has been true for at least the past 10 years and most likely is still going to be true for the next 10. The value is obviously there but there are a myriad of t’s to cross and i’s to dot until the moment some form of a high level flow will become a viable alternative to RTL verification. In the meantime we still need to find a way to make the current tried and true verification flows more efficient. So as I always do when I grapple with existential verification topics, I paid a visit to my friend Coverage and as always, he had an answer for me: High Level Coverage.
My friend Coverage turned into a revolutionary. We live in tumultuous times so this may not come as a surprise but seeing my friend pacing up and down the room, threatening imaginary adversaries was unnerving so I had to get to the bottom of it. What could possible turn my mild mannered friend into a raging firebrand? Once he settled down a bit, things started to clear up. Turns out that for a while now, people have been turning a blind eye on those last few percent of coverage holes as long as they did not belonged to the elite of cover targets, those that always need to be properly taken care of. “Even if there’s a bug in that area, we can always come up with a workaround or fix it in software” people would say, and who can blame them? Deadline pressures are not for the faint of heart and 2%-3% of obscure coverage targets are not going to stand in the way of tape-out bliss, right? Well, it turns out that with the relentless increase of design sizes and complexity and the worrisome shortening of the verification cycle, the number of second class coverage targets has swollen, their voice has become louder and they now threaten the verification establishment. It is ever more likely that continuing to ignore an increasing number of coverage holes will eventually lead to a silicon bug for which no quick ECO or software fix will be available and disaster will strike.
The few of you who regularly read this blog, may have wondered what happened to my friend Coverage in the past 3 months. It turns out he has been on a worldwide quest to collect wisdom from verification experts near and far. The other day I bumped into him and he was clearly troubled. After some prodding he grudgingly admitted to his concerns. “People are amassing coverage data as if it was an inflation hedge”, he blurted. “Soon it will overwhelm them to the point where it will be difficult to extract useful information from it and they will start ignoring it”.
The other day I listened in while my friend Coverage told the neighborhood kids the Thanksgiving story. It went something like this. Once upon a time the verification engineers in the Old World design houses were not free to practice verification the way they wanted. Instead, they had to follow a strict directed test methodology imposed to them by long standing traditions. One day a group of them gathered a few of their test benches, boarded a chartered bus they called “Randflower” and left to join a new company where they could practice their own verification methodology rooted in the principles of freedom. From then on verification engineers would be free to write coverage targets based on verification plans written in a language that everybody could understand and even testbench variables would be free to take whatever values they wanted as long as they were following some constraints. However, the road to success was not to be an easy one. They had to work long hours, come up with new methodologies and tools to take advantage of them. The long nights and weekends of hard work soon started taking their toll. Many of them quit and moved to the software industry and those who stayed turned weak with frustration and exhaustion. But then one day a miracle happened. The indigenous designers in the company who had been working there for many years gathered together and shared their knowledge about the design with the verification engineers! This gave them the strength required to close on the remaining coverage targets and finally the fruits of their hard work were ready to be harvested. The verification engineers had a huge Tape-Out Feast where all the designers were invited to jointly celebrate the Turnkey Verification Environment they developed and thank their design counterparts for their invaluable help in their hour of need. They vowed that from then on they will write testbenches that can be easily shared among many verification groups and that they will share methodologies and best-practices for the benefit of the entire verification community.
Metric Driven Verification, Coverage Driven Verification, in one form or another everybody is talking about the same thing so I thought about asking my friend how he likes to be in the driver seat. With a sheepish grin he replied that it depends whether he gets to drive a Trabant or a BMW. Both German cars mind you, but… So that got me thinking. Lately, we all have been talking up methodologies, verification plans, intelligent testbenches, guiding metrics, assertion densities, etc., etc. Now these are all great topics and we definitely need to keep nurturing them however, one rather important detail seems to have slipped out of the conversation and that is the good ole’ workhorse of every verification flow, the simulator. For no matter how careful we design our testing strategies, how cleverly we place our coverage targets and how many assertions we sprinkle around the design, we still rely on the simulator to get us to our destination. Whether we define our destination as squashing every bug in sight or meeting ever shrinking delivery timelines, it will be the reliability and performance of the simulator that will save the day. From his great driver vantage point, my friend confessed that while having a GPS to tell him where he is, an intelligent radio to alert him on traffic jams, and an on-board computer to report instant gas mileage are all great assets, once he gets on the Autobahn and the pedal hits the metal, there is nothing like driving the fastest car on the road. So much for car advice.
When my friend first muttered these words, I thought he decided to leave the rewarding world of verification and become a political pundit. I was dismayed because I don’t like the term pundit, it rhymes with bandit. Ever wondered why we have verification gurus and they have political pundits? In any case, it turned out it was about a far less controversial kind of stimulus package, the one you feed to your design to tickle its inputs and make its transistors go crazy. Phew!
You may remember the suggestive metaphor of a butterfly flapping its wings in California and causing a tornado on the other side of the globe. No, I am not attempting to apply chaos theory to coverage (although… ;-)), I am merely picking up where I left off last time and make a case that the various parts that collectively define the coverage problem are tightly connected and that the decisions we take for each part will inevitably have a profound effect on the others. Let’s take a look at some of these connections and the potential pitfalls if we ignore them.
I once had lunch with the CEO of a start-up and asked him what skills he thought I needed to acquire if I wanted to run my own company. He quickly replied I needed to understand Marketing. Now if you come from the Engineering side of our world as I do, your reaction is probably similar to mine at the time: “What?” I thought, “is getting ready for DAC really that important??”. In case this is indeed what you’re thinking, here are 2 must-reads: “Marketing High Technology” by William Davidow and “Crossing the Chasm” by Geoffrey Moore. It turns out that there is a lot more to Marketing than meets the ignorant eye. Among the many interesting concepts, the one that stuck with me is called in one way or another, “The Whole Product”. Its beauty lies, as it often does, in its simplicity, and goes something like this: real success comes from delivering to the market a Whole Product and not just a piece of technology. It is pretty common sense, you don’t just put out a chip or a piece of software and hope somebody will figure out what to do with them, you either build (or make sure somebody else does) complete systems around the chip or integrate your software within existing flows, you strike alliances with other software and/or hardware providers, you build a support infrastructure, delivery channels, prepare documents, trainings, etc. etc. You get the idea and if you don’t, try typing iPhone in your search bar.
Guess I should start with a disclaimer: I don’t know much about risk management. If I did, I would start an investment outfit call it “Golden Socks”. “Golden Socks” would capitalize on the universal dream of software ownership, help fuel a software bubble and get you to buy software you cannot afford. At the same time “Golden Socks” would bet that you won’t be able to pay maintenance for your software and have to give it back. Or something like that.