There was a huge technology announcement on 3D XPoint(tm) technology about 3 weeks ago – but without many details. I’m at the IDF2015 conference in San Francisco this week and we learned a lot more.
Posted in DDR Controller, DDR PHY, DDR4, DIMM, DRAM Industry, Uncategorized |
It’s been about 9 months since I blogged on Samsung’s public roadmap and the fact that it carried some 3D Stacked DDR4 Devices using Through Silicon Vias (TSVs). Time for a quick update…
Posted in DDR4, DIMM, DRAM Industry, Featured, Uncategorized |
A customer asked us, “Do I need DDR4 write CRC beyond a certain frequency?”
The answer is far from simple; it’s dependent on many factors including the type of system it is, the other types of error correction (ECC) that may be in use, the system’s tolerance of errors, and the system’s ability to spare the bandwidth required for the write CRC function. Since I’ve been asked a few times and since the answer is so complex, I created the flowchart here to show some paths through the possible choices.
Posted in DDR Controller, DDR4, DRAM Industry, Featured, Signal Integrity, Uncategorized |
Our friends in Synopsys’s Verification Group have been putting together an excellent set of Memory Verification IP (VIP) for DDR4, DDR3, LPDDR4, LPDDR3, that complements our other VIP for Flash, MIPI, PCIe, AMBA, Ethernet, HDMI, SATA, etc…
Posted in DDR Controller, DDR PHY, DDR3, DDR4, DRAM Industry, HBM, High Bandwidth Memory, HMC, Hybrid Memory Cube, LPDDR3, LPDDR4 |
Samsung made a big event of the launch of the Galaxy S6 today (April 10th, 2015) making the S6 and S6 Edge available at multiple US and international retailers simultaneously. The Galaxy S6 is based around Samsung’s own Exynos 7420 application processor and LPDDR4 DRAM.
Posted in DDR Controller, DDR PHY, DDR4, DRAM Industry, Low Power, LPDDR4, Uncategorized |
I have written on the topic of Row Hammering in a White Paper I published last year (link here) but since it is in the spotlight recently I thought I’d dedicate a blog entry to it. I had never considered this to be a security hole until this morning.
Posted in DDR3, DDR4, DIMM, DRAM Industry, Signal Integrity, Uncategorized |
A good friend of mine alerted me that Dell’s latest product lines featuring DDR4 memory are scheduled to ship as early as next week. A quick summary:
Posted in DDR4, DIMM, DRAM Industry, Uncategorized |
Have you been looking for DDR4 datasheets? Here is a roundup of what’s available online from the memory vendors:
Posted in DDR4, DRAM Industry, Uncategorized |
Samsung has posted their DDR4 product guide on their website, and it gives us excellent insight into the direction that Samsung plans to go with DDR4 in the next few months with a lot of data that wasn’t previously publicly available.
Posted in DDR4, DIMM, DRAM Industry, Uncategorized |
Since last week’s announcement of Intel CPUs supporting DDR4, the first almost-announcement of a DDR4 machine by a major PC manufacturer that I have found is the Alienware Area-51 (Alienware is a Dell subsidiary). I say almost-announcement because at the time of writing this blog, Alienware’s website didn’t include any details of when it will be available for sale, or how much it would cost, or anything like a press release on it. The machine will be capable of running up to three 4K monitors simultaneously and support up to 32GB of DDR4 memory running DDR4-2133.
Posted in DDR4, DIMM, DRAM Industry, Uncategorized |
Graham Allan
Graham Allan is the Sr. Product Marketing Manager for DDR PHYs at Synopsys. Graham graduated from Carleton University's Electrical Engineering program with a passion for electronics that landed him in the field of DRAM design at Mosaid in Ottawa, Canada. Beginning at the 64Kb capacity, Graham worked on DRAM designs through to the 256Mb generation. Starting in 1992, Graham was a key contributor to the JEDEC standards for SDRAM, DDR SDRAM and DDR3 SDRAM. Graham holds over 20 patents in the field of DRAM and memory design.