People are sometimes surprised when I tell them that more than $40 Billion of DRAM chips are sold every year – but have you ever wondered where they all go?
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Posted in DDR Controller, DDR4, DIMM, IP, Signal Integrity
As reported by Chipworks last week, the Apple iPhone 6S is using 2GB of LPDDR4 DRAM. This means that Apple is now joining other phones such as the LG Gflex2, the Samsung Galaxy S6, Xiaomi Mi Note Pro, HTC OneM9, and several others in using LPDDR4 RAM.
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Posted in DDR Controller, DDR PHY, LPDDR3, LPDDR4
There was a huge technology announcement on 3D XPoint(tm) technology about 3 weeks ago – but without many details. I’m at the IDF2015 conference in San Francisco this week and we learned a lot more.
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Posted in DDR Controller, DDR PHY, DDR4, DIMM, DRAM Industry, Uncategorized
A customer asked us, “Do I need DDR4 write CRC beyond a certain frequency?”
The answer is far from simple; it’s dependent on many factors including the type of system it is, the other types of error correction (ECC) that may be in use, the system’s tolerance of errors, and the system’s ability to spare the bandwidth required for the write CRC function. Since I’ve been asked a few times and since the answer is so complex, I created the flowchart here to show some paths through the possible choices.
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Posted in DDR Controller, DDR4, DRAM Industry, Featured, Signal Integrity, Uncategorized
Our friends in Synopsys’s Verification Group have been putting together an excellent set of Memory Verification IP (VIP) for DDR4, DDR3, LPDDR4, LPDDR3, that complements our other VIP for Flash, MIPI, PCIe, AMBA, Ethernet, HDMI, SATA, etc…
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Posted in DDR Controller, DDR PHY, DDR3, DDR4, DRAM Industry, HBM, High Bandwidth Memory, HMC, Hybrid Memory Cube, LPDDR3, LPDDR4
Samsung made a big event of the launch of the Galaxy S6 today (April 10th, 2015) making the S6 and S6 Edge available at multiple US and international retailers simultaneously. The Galaxy S6 is based around Samsung’s own Exynos 7420 application processor and LPDDR4 DRAM.
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Posted in DDR Controller, DDR PHY, DDR4, DRAM Industry, Low Power, LPDDR4, Uncategorized
I’m thrilled to blog about our latest IP prototyping kits that allow much faster FPGA prototyping of your DDR designs. In the last few years I’ve seen our HAPS prototyping boxes at more and more of our customers, and people I’ve talked to really like the ability to do their software prototyping for their DDR IP on their desktops long before their SoCs are manufactured.
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Posted in DDR Controller, DDR PHY, DDR3, DDR4, DIMM, LPDDR3
Yesterday was Memcon time again. Memcon is the event that Denali started as a one-day conference in Silicon Valley that is all about memory. After Cadence acquired Denali, Cadence now hosts the event.
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Posted in DDR Controller, DDR PHY, DDR4, LPDDR4
As predicted in my earlier blog entry, today is the official launch of Intel’s products supporting DDR4.
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Posted in DDR Controller, DDR4, DIMM, DRAM Industry
JEDEC officially published the LPDDR4 standard today. It is very impressive how quickly LPDDR4 was standardized given the comparably long time it took for DDR4 from start to publication. That is primarily driven by the pace of the smartphone market and the need for increased memory bandwidth year over year which has far outpaced the memory bandwidth growth requirement in the “PC” SDRAM market. The JEDEC committees responsible for this latest publication should be very proud of their achievement. Most of the people on these committees have “regular day jobs” outside of JEDEC and the support from the various companies involved is also appreciated.
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Posted in DDR Controller, DDR PHY, LPDDR4