Posted by Marc Greenberg on June 11, 2016
Dear readers, I’ll warn you in advance that this blog post is sad and somewhat personal. If that’s not what you want to read right now, check out one of my other blog posts.
By now you have probably seen the TV commercials showing the latest model vehicles that can automatically initiate braking when they detect a collision is imminent. Technologies like this are known as “Advanced Driver Assistance Systems” (ADAS).
Over the last while, I’ve been meeting with automotive silicon vendors to discuss automotive safety requirements for DDR – especially LPDDR4 – and compliance to standards like ASIL, ISO26262 and AEC Q100. The requirements of meeting these standards are difficult and time-consuming, and although our processes at Synopsys are relatively in-line with these standards, there are many documentation and record-keeping tasks plus some extra engineering work and new features we have implemented to be compliant with the automotive standards.
Automotive compliance is quite a task, and it’s a popular topic. Two of the largest crowds I saw at the Design Automation Conference (DAC) this week were at the Synopsys booth listening to presentations on Synopsys’s Automotive IP portfolio and our new transient fault validation tools that are now part of Synopsys through our WinterLogic acquisition.
The goal is to allow vehicles to implement “Advanced Driver Assistance Systems” (ADAS) in the very near term and eventually achieve the goal of self-driving cars. As these ADAS chips will effectively be in control of the car, it’s necessary that they have a high level of fault detection in case it’s ever necessary for the ADAS to rescind control of the vehicle back to the human driver because of a silicon or sensor failure.
Given that neither my Wife nor I have ever been in a forward collision, I had been thinking of ADAS technology in general as “interesting but not necessarily mandatory”. As of last night, my opinion of ADAS has changed.
Last night I learned that Alexei Bauereis was struck by an SUV while walking his bicycle across a crosswalk. Alexei died later in the hospital. He was 14 years old.
This hits particularly close to home for me for a number of reasons: I used to work closely with Alexei’s father, Eric Bauereis, when we were both at Denali. I had met Alexei and watched him play hockey in an exhibition match with the University of Texas hockey team. Alexei was just one year older than my son. The accident happened at an intersection I travel through regularly, and it’s just a block away from my son’s school. On another night, at another intersection, that could be my own son. I can’t imagine the pain the Bauereis family must be going through.
All I know of the driver of the SUV is from media reports, the driver of the SUV stopped to render aid and they have not as yet been charged by the police. And they probably feel terrible right now.
So back to the topic of ADAS. I’ve read studies that show that the majority of drivers feel that everyone else on the road is a bad driver. So ADAS is something that you want for everyone else on the road to have so that they won’t run into you or your family.
We the engineering community have the technology to make ADAS pervasive in new vehicles – let’s do it fast, let’s do it right, let’s make it at a price point that’s accessible to every purchaser of a new car, and let’s make it reliable to last the lifetime of the vehicle. Let’s make the type of accident that killed Alexei Bauereis a thing of the past.
Alexei, may you forever dance with the stars.
Graham Allan is the Sr. Product Marketing Manager for DDR PHYs at Synopsys. Graham graduated from Carleton University's Electrical Engineering program with a passion for electronics that landed him in the field of DRAM design at Mosaid in Ottawa, Canada. Beginning at the 64Kb capacity, Graham worked on DRAM designs through to the 256Mb generation. Starting in 1992, Graham was a key contributor to the JEDEC standards for SDRAM, DDR SDRAM and DDR3 SDRAM. Graham holds over 20 patents in the field of DRAM and memory design.