Download Brochure
Contact Us
Contact Us
Contact Us
  • Software Integrity
  • Tools
  • Services
  • Training
  • Solutions
  • Resources
  • Customers
  • Partners
  • Blog
Contact Sales
  • Company
  • About Us
  • Investor Relations
  • Community
  • Newsroom
  • Resources
  • Careers
Contact Us
All Synopsys
+ Silicon Design & Verification + Silicon IP + Software Integrity + About Us
Support
SolvNet Software Integrity Customer Community
Global SItes
???? ? ???? ???? ???? ?????? Deutsche Webseite

Committed to Memory

«
»
 

Apple iPhone 6S: LPDDR4 arrives at Apple

Posted by on September 29, 2015

As reported by Chipworks last week, the Apple iPhone 6S is using 2GB of LPDDR4 DRAM. This means that Apple is now joining other phones such as the LG Gflex2, the Samsung Galaxy S6, Xiaomi Mi Note Pro, HTC OneM9, and several others in using LPDDR4 RAM.

The decision to use LPDDR4 appears to be a costly one. Teardown.com reports that LPDDR4 was a significant cost adder to the iPhone6S, raising the cost of DRAM from $4.50 for the 1GB LPDDR3 used in the iPhone 6, up to $16 for the 2GB of LPDDR4 in the iPhone 6S.

I expect the benefit of adding LPDDR4 to be substantial. The LPDDR4 part used is a Micron MT53B256M64D2NL if you read the Chipworks report, an unnamed Samsung part if you read the Teardown.com report or a Samsung K3RG1G10BM-BGCH if you read the iFixit report. A little sleuthing on the Micron website using the FBGA part number decoder and part numbering guide shows this to be a 2-rank LPDDR4 part, 64-bits wide (2 16-bit channels per die) capable of 1600MHz operation (3200MT/s data rate per pin) and a total of 2GB of RAM.

Generally we expect much of the system improvement in the iPhone 6S to come from the doubling of DRAM capacity and the substantially higher memory bandwidth that comes from LPDDR4 that has about 70% more peak bandwidth than the LPDDR3 device it replaces in the iPhone6.

I am looking forward to getting my hands on one…

Share and Enjoy:
  • del.icio.us
  • Digg
  • Facebook
  • Google Bookmarks
  • Print
  • Twitter
  • StumbleUpon
  • LinkedIn
  • RSS
This post is filed under DDR Controller, DDR PHY, LPDDR3, LPDDR4.
 
Subscribe
Subscribe to Committed to Memory RSS
About
This memorable blog is about DRAM in all its forms, especially the latest standards: DDR3, DDR4, LPDDR3 and LPDDR4. Nothing is off limits--the memory market, industry trends, technical advances, system-level issues, signal integrity, emerging standards, design IP, solutions to common problems, and other stories from the always entertaining memory industry.
The Authors

Graham Allan

Graham Allan is the Sr. Product Marketing Manager for DDR PHYs at Synopsys. Graham graduated from Carleton University's Electrical Engineering program with a passion for electronics that landed him in the field of DRAM design at Mosaid in Ottawa, Canada. Beginning at the 64Kb capacity, Graham worked on DRAM designs through to the 256Mb generation. Starting in 1992, Graham was a key contributor to the JEDEC standards for SDRAM, DDR SDRAM and DDR3 SDRAM. Graham holds over 20 patents in the field of DRAM and memory design.