Committed to Memory

Archive for 2014

 

Synopsys DDR3 PHY Now Available for Intel’s 22nm Tri-Gate Process

It’s DAC time again and that means lots of EDA and IP related announcements.

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Posted in DDR PHY, DDR3, DDR4, IP, Low Power, LPDDR4, Signal Integrity | Comments Off on Synopsys DDR3 PHY Now Available for Intel’s 22nm Tri-Gate Process

 

Synopsys’ New IP Accelerated Initiative

Synopsys made an exciting announcement today launching our new IP accelerated initiative to help designers significantly reduce the time and effort of integrating IP into their SoCs. This initiative augments Synopsys’ broad portfolio of DesignWare® IP with the addition of new IP Prototyping Kits, IP Virtual Development Kits and customized IP subsystems to accelerate prototyping, software development and integration of IP into SoCs. With the IP Accelerated initiative, Synopsys goes beyond the traditional IP supplier paradigm, redefining what customers can expect from their IP providers to help them successfully integrate IP with less effort, lower risk and faster time-to-market.

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The Future of DRAM

A lot has been written about DDR SDRAMs, both the compute variety (DDR3/4) and the mobile variety (LPDDR3/4) and what may come after these technologies run their course.  One thing is certain; the future will not be an easy path for DRAMs.  The DDR protocol based on a wide parallel bus with single ended signaling and a source synchronous data strobe and non-embedded clock is not scalable beyond the data rates currently specified for these technologies.  After DDR4, the world will need something else as the DDR interface cannot realistically be expected to run at data rates higher than 3200Mbps in a traditional computer main memory environment.  Unfortunately, that something else will likely be “somethings” else.  Likewise, the smartphone’s insatiable need for higher bandwidth from main memory DRAM will also lead to a deviation from the wide parallel bus based DRAM.

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Posted in DDR3, DDR4, DRAM Industry, HBM, High Bandwidth Memory, HMC, Hybrid Memory Cube, IP, LPDDR3, LPDDR4, Signal Integrity, Wide I/O, Wide I/O2 | Comments Off on The Future of DRAM

 

Synopsys Announces Complete LPDDR4 IP Solution

We are thrilled about today’s blog topic: the announcement of Synopsys’s complete LPDDR4 IP solution!

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Posted in DDR Controller, DDR PHY, DDR3, DDR4, DRAM Industry, IP, Low Power, LPDDR3, LPDDR4, Signal Integrity | Comments Off on Synopsys Announces Complete LPDDR4 IP Solution

 

Qualcomm announces first application processor with LPDDR4 capability

This happened a little bit quietly last week – but Qualcomm has announced the first product that I’m aware of that will use LPDDR4 memory.

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Posted in DDR Controller, DDR PHY, IP, Low Power, LPDDR4, Uncategorized | Comments Off on Qualcomm announces first application processor with LPDDR4 capability

 

Two DDR Tidbits

The definition of tidbit is:

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Posted in DDR3, DDR4 | Comments Off on Two DDR Tidbits

 

Intel announces DDR4 support

This is a big day for DDR4: For the first time, Intel has announced DDR4 support in their desktop CPU roadmap.

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The first DDR4 DIMMs are for sale!

I think I have found the first DDR4 DIMMs available for consumer purchase anywhere. Crucial and a few others were showing DDR4 DIMMs at this year’s Consumer Electronics Show (CES) in January, so it’s nice to see that they translated into real products.

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“How Fast Can My DDR Go?”

As a provider of DDR PHY and controller IP, the question we get asked the most goes something like this:  “Will your PHY support a {insert short description of system here} at {fill in the speed here} Mbps?  Lately, I am receiving a lot of questions around DDR4 such as “Will your DDR4 PHY support one dual rank UDIMM at 2667Mbps”?

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Happy 10th Birthday DDR4!

Believe it or not, work the DDR4 standard was first started back in 2004.  That’s now 10 years ago!  Happy 10th birthday DDR4.  10 years ago Facebook was started up, there was no Twitter (2006), no iPhone (2007), and Google went public for $85/share (it is now $1,123/share).  Even after those 10 years, you can’t go out a buy a computer with DDR4 in it.  The JEDEC standard for DDR4 was published in September 2012 so why isn’t everyone using it?  Why did it take so long?

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Posted in DDR4, DRAM Industry, Low Power, LPDDR3, LPDDR4, Signal Integrity | Comments Off on Happy 10th Birthday DDR4!