Recently I blogged on a change in the way Xilinx reports the capacity of their new UltraScale FPGA devices. At the end of the blog I left with the following questions
A while back I wrote about a couple of ways to develop ARM-based software (and other CPU software) using either a physical connection to a hardware board with a CPU subsystem or a Virtual connection to a CPU subsystem using Hybrid Prototyping. I still stand by my conclusion that the Hybrid Prototyping approach provides the most flexibility and is the best solution for early software development.
I read an article recently which stated that emulation is the key to Virtual Prototypes, I would like to ride the theme wave and extend the horizon to include FPGA-based prototyping. Back in 2012, Synopsys introduced the first integrated Hybrid Prototyping solution, the combination of Virtualizer Virtual Prototypes and HAPS FPGA-based Prototypes. Our customers recognized a long time ago that the combination accelerates system bring-up by using virtual prototyping for new design blocks or CPU subsystems and FPGA-based prototyping for existing logic.
LAST CHANCE TO VOTE: The ARM TechCon Innovation Challenge panel has announced the finalists and I am happy to announce that HAPS-80 with ProtoCompiler was selected as one of only twelve. Now it’s your turn to choose the overall winner. Please vote for HAPS-80 FPGA-Based Prototyping system
The ARM TechCon Innovation Challenge panel has announced the finalists and I am happy to announce that HAPS-80 with ProtoCompiler was selected as one of only twelve. Now it’s your turn to choose the overall winner. Please vote for HAPS-80 FPGA-Based Prototyping system
Trolling the Xilinx documentation I noticed something amazing while looking at the UltraScale FPGA Product Tables and Product Selection Guide, the VU440 UltraScale device seems to have grown in FPGA capacity. Previously quoted as 4.4M Logic Cells the VU440 is now 5.5M System Logic Cells. Incredible the VU440 is now 25% larger…. Or is it….
The term “Dark Fibre (Fiber) refers to the additional lines/capacity of optical connections a carrier would install when they laid a new pipeline. These unlit optical connections were built in assuming the need for additional capacity in the future. The thinking was that it’s cheaper to do it all at once vs. adding lines/pipelines later. The problem is that this extra capacity is going to waste and while the main carrier was not using it, someone else could have.
Ultimately when you hand-off your physical FPGA-based prototype to the end users there are only two things that they care about; Performance, Performance, Performance. I know I said there were only two things but performance is so important I listed it three times.
This week we will discuss the simulator like debugging experience that users of the new HAPS-80 with ProtoCompiler solution get. The new solution includes built-in debug which means that the ProtoCompiler flow incorporates debug and the HAPS-80 hardware has debug capabilities physically built in. The ProtoCompiler flow ensures that the inclusion of debug it mostly seamless to the user and the HAPS-80 built in debug hardware ensures that the advanced capabilities are available without the need to purchase additional hardware.
Over the next couple of weeks I’ll blog with more details on the key capabilities of the newly available HAPS-80 with ProtoCompiler integrated solution.