Breaking The Three Laws

Archive for the 'Uncategorized' Category

 

The best of the best for 2015 – Physical Prototyping Blog Awards

Happy New Year and all that. What an fantastic 2015 for physical prototyping and I expect 2016 to be even better now the Xilinx UltraScale based solutions are rolling out. Of course the highlight of the work year for me was the launch of the HAPS-80 with ProtoCompiler.

Continue Reading...

Posted in Uncategorized |

 

How Proven Solutions Reduce Risk

A couple of weeks back Synopsys announced that we had shipped, to date, over 5000 HAPS systems across more than 400 customers

Continue Reading...

Posted in Uncategorized |

 

Reuse ROI Proof Point, USB 3.0 SSIC across MIPI M-PHY with a slice of HAM

I have to hand it to Eric Huang and Hezi Saar they make entertaining videos that turn USB 3.0 and MIPI M-PHY from boring to wow. Check out their latest video which shows Synopsys’ DesignWare USB 3.0 RTL controller running on the HAPS-51 (-2) systems with Synopsys’ MIPI M-PHY. http://blogs.synopsys.com/tousbornottousb/2013/05/17/industrys-first-demo-of-usb-3-0-ssic-and-mipi-m-phy-passing-usb-compliance-tests/  

Continue Reading...

Posted in Uncategorized |

 

How IO Interconnect Flexibility and Signal Mux Ratios Affect System Performance

One of the “Breaking The Three Laws” is that your SoC partitioned blocks typically have more signals than physical IO’s on the FPGA. Technically this is not one of the three laws but it should have been and as I own this blog I can make one more up. Welcome to the Breaking The Four Laws blog. During a recent engagement for the HAPS-70 the user wanted Synopsys to create a demonstration proving the HAPS High Speed Time Domain Multiplexing, HSTDM and Certify tool automation capabilities. The challenge; Create a design which passed 1800 signals between four FPGA’s using less than 200 physical IO’s.

Continue Reading...

Posted in Uncategorized |

 

Globally located R&D enablement, SRAM Daughter Boards & High Speed IO

This week I’m visiting one of our R&D teams based in Erfurt Germany. I took the opportunity to take some photos of the HAPS-70 development systems along with a number of the off-the-shelf daughter boards which are available from Synopsys as part of the solution.

Continue Reading...

Posted in Uncategorized |

 

HAPS-70 Receives “Best Innovation” Award

Happy New Year and all that. I hope that you all took at least some time over the break to relax and reflect on your achievements in 2012. I would have blogged sooner but we had a spot of bother with the Synopsys website. Anyway it’s full steam ahead now.

Continue Reading...

Posted in Uncategorized |

 

The Smörgåsbord Blog

I have many things to cover in this week’s blog, first is nothing to do with FPGA-Based Prototyping, it’s a shout out to my friend Eric Huang. Eric is the Product Manager of the DesignWare IP for USB 3.0 products and the source of my amusement last week. The same week Eric had a biking accident which was bad enough that he was rushed to hospital in an ambulance. Eric is back at work but I urge you to wish Eric all the best by posting comments in his Blog, To USB or Not to USB. Wishing you a speedy recovery Eric.

Continue Reading...

Posted in Uncategorized |

 

Keeping Your RTL Clean: Part 2

Hi Prototypers,

Continue Reading...

Posted in FPMM Methods, Uncategorized |

 

“Verification or Validation? What do you think?”

Would you kindly help me clear something up?

Continue Reading...

Posted in Uncategorized |

 

Keeping Your RTL Clean: Part 1

It’s pretty obvious that if we can avoid FPGA-hostility in our designs then the prototype will be ready sooner. However, we can’t expect RTL designers to compromise the final chip design just in order to help us prototypers. So that’s why we advocate Design-for-Prototyping as the way to make the design more robust and portable so that everybody wins.

Continue Reading...

Posted in Uncategorized |