Not many people know this but I am a FPGA-based prototyping Ninja-Fu master. What super power do I have you ask? I have the power to enable higher performance prototype operation and in this week’s blog I am sharing this ancient secret power with you. Wow, the start of this blog sounds like the bio from a really bad “B” movie, it definitely seemed funnier in my mind, then again everything seems funnier in my mind. There is actually some seriousness to this blog as I really am going to share the not so secret method to enable higher performance in your FPGA-based prototypes.
Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development, FPGA-Based Prototyping, HW/SW Integration, In-System Software Validation, IP Validation, Mick's Projects, System Validation, Use Modes |
I often get asked about enabling early software development and there are a number of technologies that can help here. Of course the earliest way to enable software development is with Virtual Prototyping using tools like Synopsys’ Virtualizer. A virtual prototype has the advantage that it can be done pre-RTL so at any time during the project phase. This is a great approach but the specific question I was asked this week was is there any way to run software against a new RTL design before a processor is integrated into the design. Again, easy answer, Hybrid Prototyping, this is where you typically model the CPU subsystem in the virtual prototype and connect to the FPGA-based prototype via transactors.
Last week over a lunch break, rather than relaxing or even eating I decided to create some fun HAPS desk ornaments to brighten up my office. I had run across this nice little App called Foldify http://www.foldifyapp.com/ It’s a great little app that enables you draw, create and paste images onto blank flat forms. You then print them out and fold them on the dotted lines. I then sent the ones I created to my team and management so they too could enjoy these desktop fun creations.
In a recent customer meeting they described how they used FPGA-Based prototyping and explained the two use models. It was an interesting exchange which I thought would also benefit the blog readers. The two use modes were described as “real time” and “functional” prototyping.
If we look at the FPMM survey respondent data it’s clear to see that the favored FPGA device for FPGA-based prototyping is Xilinx devices
It’s been a quiet week for me and prototyping but I did talk to an engineer about command and control of an FPGA-based prototype which I thought was quite interesting I will share the story.
A couple of folks complained that my last blogs have been a bit long and boring. (Boring! Me?) So I would like to start this week and apologize to all my 5th Grade readers, I’ll try harder in the future to use smaller words and more pictures.