Breaking The Three Laws

Archive for the 'Early Software Development' Category

 

Verifying Power Management Modes, both Software and Hardware

Quote: “It works! After disabling power management for my WiFi stick in Raspberry PI configuration it is now working!!” BTW: This blog was inspired by a true story of a challenge that Achim Nohl, Technical Marketing Manager for HAPS Physical Prototyping recently experienced: https://www.raspberrypi.org/forums/viewtopic.php?f=28&t=51543 Power management is an increasingly complex function provided by hardware and controlled by a […]

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Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development, HW/SW Integration, Man Hours Savings, System Validation, UltraScale, UPF, Use Modes | Comments Off on Verifying Power Management Modes, both Software and Hardware

 

It’s not too late to attend SNUG Silicon valley

Hey, it’s not too late to attend SNUG Silicon Valley: http://www.synopsys.com/Community/SNUG/Silicon%20Valley/pages/default.aspx Prototyping topics: Techniques Used to Partition a Complex-SoC into Multi-HAPS-70 System FPGA Debug: Improving Debug Turnaround Time in High Speed Designs Accelerate Your Prototyping Productivity Leveraging HAPS Integrated Prototyping Solution Adapt, Port, and Integrate Quickly – Prototyping the Right Way Address TTM by Prototyping […]

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Posted in ASIC Verification, Bug Hunting, Daughter Boards, Debug, DWC IP Prototyping Kits, Early Software Development, FPGA-Based Prototyping, FPMM Methods, Getting Started, HAPS-80, HW/SW Integration, In-System Software Validation, IP Validation, Man Hours Savings, Performance Optimization, Project management, Real Time Prototyping, Support, System Validation, Technical, Tips and Traps, UltraScale, Use Modes | 1 Comment »

 

What’s in it for me? The market shift to integrated Physical Prototyping

FPGA-based physical prototyping is the go-to standard for high-performance, high-productivity verification, debug, and software development on many electronic systems today. But, it is becoming increasingly difficult to put together an ad-hoc prototype mixing pieces from various vendors with home-grown components. With the complexity of today’s systems, an integrated prototyping system can bring significant advantages. Learn […]

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Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development, HAPS-80, HW/SW Integration, Hybrid Prototyping, In-System Software Validation, IP Validation, Man Hours Savings, Performance Optimization, Real Time Prototyping, System Validation, UltraScale, Use Modes | Comments Off on What’s in it for me? The market shift to integrated Physical Prototyping

 

Debug: Zero in on Defects Using Global State Visibility & Other High Visibility Capabilities

Design defects (bugs) can be introduced at multiple levels in the design process from RTL defects, SW defects and Integration defects. The key to rapidly locating these bugs is to tailor the debug strategy to the type of bugs you are looking for. Depending on where you are in the design cycle usually dictates which […]

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Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development, HAPS-80, HW/SW Integration, In-System Software Validation, IP Validation, Man Hours Savings, System Validation, UltraScale | 2 Comments »

 

Q&A Using FPGA Prototypes for Software Development & More

Great article by Tom De Schutter on using Physical Prototyping for software development. The article goes into other use cases and explores the age old make vs. buy decision making process. Click here for the full article To SUBSCRIBE use the Subscribe link in the left hand navigation bar. Another option to subscribe is as […]

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Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development, HAPS-80, HW/SW Integration, In-System Software Validation, IP Validation, Man Hours Savings, Performance Optimization, Project management, Real Time Prototyping, System Validation, Use Modes | Comments Off on Q&A Using FPGA Prototypes for Software Development & More

 

What to use first, Emulation or Physical Prototype?

I ran into the article below titled Emulation vs. Prototyping. http://www.eetimes.com/author.asp?section_id=36&doc_id=1328736 This article ALMOST got it right (IMO), but not quite. Firstly it should not be “vs.”, the two technologies are complementary and typically used side by side so it should be “&”. Secondly, with todays challenges the trend is that engineering teams start with […]

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Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development | Comments Off on What to use first, Emulation or Physical Prototype?

 

Video: Using HAPS to Verify DesignWare USB Type-C IP Functionality

In a continuation of last week’s blog titled “Validating USB Type-C using Physical Prototyping” one of the key USB folks here at Synopsys, Morten Christiansen, made a short 30 second video of the DesignWare USB Type-C physical prototype in action. (Click the picture to take you to the video) While this video is short it […]

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Posted in Daughter Boards, Debug, DWC IP Prototyping Kits, Early Software Development, HW/SW Integration, IP Validation, Man Hours Savings, Milestones, Real Time Prototyping | Comments Off on Video: Using HAPS to Verify DesignWare USB Type-C IP Functionality

 

Validating USB Type-C using Physical Prototyping

This week Synopsys Introduced the DesignWare USB 3.1 Type-C IP with DisplayPort 1.3 and HDCP 2.2 for High-Bandwidth Data Transfer with Content Protection. USB has been continually evolving and USB Type-C is the one cable to connect them all. The USB Type-C is already gaining widespread acceptance and is becoming the most rapidly adopted USB […]

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Posted in ASIC Verification, Bug Hunting, Daughter Boards, DWC IP Prototyping Kits, Early Software Development, HW/SW Integration, IP Validation, Man Hours Savings, Project management, System Validation, Use Modes | Comments Off on Validating USB Type-C using Physical Prototyping

 

Prototyping Low Power Functions Using UPF

Regardless of the market segment your product targets you are being required to build it with the lowest power operation to either compete, differentiate or just be more green. This week I ran into a customer who unfortunately had to re-spin their chip due to a low power mode of operation issue. The software was […]

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Posted in ASIC Verification, Bug Hunting, Early Software Development, HAPS-80, HW/SW Integration, In-System Software Validation, System Validation, UltraScale, Use Modes | Comments Off on Prototyping Low Power Functions Using UPF

 

Fastest Time to Productivity using DesignWare IP, HAPS with ProtoCompiler & Hybrid Prototyping

While traveling this week I found myself explaining the value of Hybrid Prototyping when used with DesignWare IP or your own IP blocks and RTL code. Simply put, using Hybrid Prototyping you can immerse the IP in the context of the SoC without needing to have RTL for the whole SoC. Hybrid Prototyping enables a […]

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Posted in Debug, DWC IP Prototyping Kits, Early Software Development, Hybrid Prototyping, In-System Software Validation, IP Validation, Man Hours Savings, Use Modes | Comments Off on Fastest Time to Productivity using DesignWare IP, HAPS with ProtoCompiler & Hybrid Prototyping