Breaking The Three Laws

Archive for the 'Bug Hunting' Category

 

Innovation Increases Design Visibility and Boosts Performance of FPGA-based Prototypes

I just noticed (late) that the latest release of HAPS ProtoCompiler, 2016.03 is available. The new release can be found under SolvNet here. (A SolvNet ID and a valid HAPS ProtoCompiler license will be needed for download.) The new release includes capabilities which reduce the time to first prototype even more than we do today, […]

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Posted in ASIC Verification, Bug Hunting, Debug, FPGA-Based Prototyping, HAPS-70, HAPS-80, Man Hours Savings, Performance Optimization, Real Time Prototyping, Tips and Traps, UltraScale | Comments Off on Innovation Increases Design Visibility and Boosts Performance of FPGA-based Prototypes

 

Verifying Power Management Modes, both Software and Hardware

Quote: “It works! After disabling power management for my WiFi stick in Raspberry PI configuration it is now working!!” BTW: This blog was inspired by a true story of a challenge that Achim Nohl, Technical Marketing Manager for HAPS Physical Prototyping recently experienced: https://www.raspberrypi.org/forums/viewtopic.php?f=28&t=51543 Power management is an increasingly complex function provided by hardware and controlled by a […]

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Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development, HW/SW Integration, Man Hours Savings, System Validation, UltraScale, UPF, Use Modes | Comments Off on Verifying Power Management Modes, both Software and Hardware

 

It’s not too late to attend SNUG Silicon valley

Hey, it’s not too late to attend SNUG Silicon Valley: http://www.synopsys.com/Community/SNUG/Silicon%20Valley/pages/default.aspx Prototyping topics: Techniques Used to Partition a Complex-SoC into Multi-HAPS-70 System FPGA Debug: Improving Debug Turnaround Time in High Speed Designs Accelerate Your Prototyping Productivity Leveraging HAPS Integrated Prototyping Solution Adapt, Port, and Integrate Quickly – Prototyping the Right Way Address TTM by Prototyping […]

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Posted in ASIC Verification, Bug Hunting, Daughter Boards, Debug, DWC IP Prototyping Kits, Early Software Development, FPGA-Based Prototyping, FPMM Methods, Getting Started, HAPS-80, HW/SW Integration, In-System Software Validation, IP Validation, Man Hours Savings, Performance Optimization, Project management, Real Time Prototyping, Support, System Validation, Technical, Tips and Traps, UltraScale, Use Modes | Comments Off on It’s not too late to attend SNUG Silicon valley

 

What’s in it for me? The market shift to integrated Physical Prototyping

FPGA-based physical prototyping is the go-to standard for high-performance, high-productivity verification, debug, and software development on many electronic systems today. But, it is becoming increasingly difficult to put together an ad-hoc prototype mixing pieces from various vendors with home-grown components. With the complexity of today’s systems, an integrated prototyping system can bring significant advantages. Learn […]

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Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development, HAPS-80, HW/SW Integration, Hybrid Prototyping, In-System Software Validation, IP Validation, Man Hours Savings, Performance Optimization, Real Time Prototyping, System Validation, UltraScale, Use Modes | Comments Off on What’s in it for me? The market shift to integrated Physical Prototyping

 

Debug: Zero in on Defects Using Global State Visibility & Other High Visibility Capabilities

Design defects (bugs) can be introduced at multiple levels in the design process from RTL defects, SW defects and Integration defects. The key to rapidly locating these bugs is to tailor the debug strategy to the type of bugs you are looking for. Depending on where you are in the design cycle usually dictates which […]

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Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development, HAPS-80, HW/SW Integration, In-System Software Validation, IP Validation, Man Hours Savings, System Validation, UltraScale | Comments Off on Debug: Zero in on Defects Using Global State Visibility & Other High Visibility Capabilities

 

Q&A Using FPGA Prototypes for Software Development & More

Great article by Tom De Schutter on using Physical Prototyping for software development. The article goes into other use cases and explores the age old make vs. buy decision making process. Click here for the full article To SUBSCRIBE use the Subscribe link in the left hand navigation bar. Another option to subscribe is as […]

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Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development, HAPS-80, HW/SW Integration, In-System Software Validation, IP Validation, Man Hours Savings, Performance Optimization, Project management, Real Time Prototyping, System Validation, Use Modes | Comments Off on Q&A Using FPGA Prototypes for Software Development & More

 

What to use first, Emulation or Physical Prototype?

I ran into the article below titled Emulation vs. Prototyping. http://www.eetimes.com/author.asp?section_id=36&doc_id=1328736 This article ALMOST got it right (IMO), but not quite. Firstly it should not be “vs.”, the two technologies are complementary and typically used side by side so it should be “&”. Secondly, with todays challenges the trend is that engineering teams start with […]

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Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development | Comments Off on What to use first, Emulation or Physical Prototype?

 

Validating USB Type-C using Physical Prototyping

This week Synopsys Introduced the DesignWare USB 3.1 Type-C IP with DisplayPort 1.3 and HDCP 2.2 for High-Bandwidth Data Transfer with Content Protection. USB has been continually evolving and USB Type-C is the one cable to connect them all. The USB Type-C is already gaining widespread acceptance and is becoming the most rapidly adopted USB […]

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Posted in ASIC Verification, Bug Hunting, Daughter Boards, DWC IP Prototyping Kits, Early Software Development, HW/SW Integration, IP Validation, Man Hours Savings, Project management, System Validation, Use Modes | Comments Off on Validating USB Type-C using Physical Prototyping

 

Prototyping Low Power Functions Using UPF

Regardless of the market segment your product targets you are being required to build it with the lowest power operation to either compete, differentiate or just be more green. This week I ran into a customer who unfortunately had to re-spin their chip due to a low power mode of operation issue. The software was […]

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Posted in ASIC Verification, Bug Hunting, Early Software Development, HAPS-80, HW/SW Integration, In-System Software Validation, System Validation, UltraScale, Use Modes | Comments Off on Prototyping Low Power Functions Using UPF

 

How to achieve a simulator like debugging experience with FPGA-based prototyping

This week we will discuss the simulator like debugging experience that users of the new HAPS-80 with ProtoCompiler solution get. The new solution includes built-in debug which means that the ProtoCompiler flow incorporates debug and the HAPS-80 hardware has debug capabilities physically built in. The ProtoCompiler flow ensures that the inclusion of debug it mostly […]

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Posted in Bug Hunting, Debug, HAPS-80, UltraScale | Comments Off on How to achieve a simulator like debugging experience with FPGA-based prototyping