I just noticed (late) that the latest release of HAPS ProtoCompiler, 2016.03 is available. The new release can be found under SolvNet here. (A SolvNet ID and a valid HAPS ProtoCompiler license will be needed for download.)
Quote: “It works! After disabling power management for my WiFi stick in Raspberry PI configuration it is now working!!”
Hey, it’s not too late to attend SNUG Silicon Valley: http://www.synopsys.com/Community/SNUG/Silicon%20Valley/pages/default.aspx
Posted in ASIC Verification, Bug Hunting, Daughter Boards, Debug, DWC IP Prototyping Kits, Early Software Development, FPGA-Based Prototyping, FPMM Methods, Getting Started, HAPS-80, HW/SW Integration, In-System Software Validation, IP Validation, Man Hours Savings, Performance Optimization, Project management, Real Time Prototyping, Support, System Validation, Technical, Tips and Traps, UltraScale, Use Modes
Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development, HAPS-80, HW/SW Integration, Hybrid Prototyping, In-System Software Validation, IP Validation, Man Hours Savings, Performance Optimization, Real Time Prototyping, System Validation, UltraScale, Use Modes
Design defects (bugs) can be introduced at multiple levels in the design process from RTL defects, SW defects and Integration defects. The key to rapidly locating these bugs is to tailor the debug strategy to the type of bugs you are looking for. Depending on where you are in the design cycle usually dictates which type of bug is more prevalent. Physical Prototyping exercises the RTL, SW and the fully integrated design so is a key technology for design verification. Having the right debug tool set if critical to accelerate the verification task.
Great article by Tom De Schutter on using Physical Prototyping for software development. The article goes into other use cases and explores the age old make vs. buy decision making process.
Posted in ASIC Verification, Bug Hunting, Debug, Early Software Development, HAPS-80, HW/SW Integration, In-System Software Validation, IP Validation, Man Hours Savings, Performance Optimization, Project management, Real Time Prototyping, System Validation, Use Modes
I ran into the article below titled Emulation vs. Prototyping.
This week Synopsys Introduced the DesignWare USB 3.1 Type-C IP with DisplayPort 1.3 and HDCP 2.2 for High-Bandwidth Data Transfer with Content Protection. USB has been continually evolving and USB Type-C is the one cable to connect them all. The USB Type-C is already gaining widespread acceptance and is becoming the most rapidly adopted USB standard in history. The need to rapidly adopt a new standard comes with challenges for the design engineers, verification team and the software developers.
Posted in ASIC Verification, Bug Hunting, Daughter Boards, DWC IP Prototyping Kits, Early Software Development, HW/SW Integration, IP Validation, Man Hours Savings, Project management, System Validation, Use Modes
Regardless of the market segment your product targets you are being required to build it with the lowest power operation to either compete, differentiate or just be more green. This week I ran into a customer who unfortunately had to re-spin their chip due to a low power mode of operation issue. The software was able to put the chip into a low power mode but due to a bug, they were unable to get the chip out of the low power mode cleanly without a system reset. This customer wanted to better verify the low power modes before tape-out this time around.
Last week I posted some anonymous results from ProtoCompiler for HAPS usage on real customer designs. While I had removed the customer names and replace them with names like, consumer electronics company, which in my opinion could have implied hundreds of different HAPS customers across the globe, the greater powers in Synopsys felt the data was still too close to the customer. I should point out that Synopsys treats customer information with the highest confidentiality and I personally did not think any confidential information was being shared. I pulled the data off my blog. Anyway, this is the first and I hope last time that Synopsys has to step in and censor my blog.