Breaking The Three Laws

Archive for the 'Admin and General' Category

 

Hitting the Mark

Just in case you had not noticed, the prototyping blog can now be found here: https://blogs.synopsys.com/hittingthemark/

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Posted in Admin and General |

 

Which is your favorite FPGA-based prototyping setup?

Interesting article posted to eetimes this week, 10 Favorite FPGA-based Prototyping Boards,

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Posted in Admin and General, HAPS-80, Support, UltraScale |

 

ESD Precautions Essential for prototype handling

Thanks to my latest project, a home built Van De Graaff generator, it reminded me to post some more information on ensuring you take ESD precautions while handling your physical prototyping hardware. These are essential when handling Xilinx Virtex-7 and UltraScale based platforms, ensuring you don’t let the magic blue smoke escape.

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Posted in Admin and General, HAPS-80, UltraScale |

 

Fantastic New Blog Post, Honest

This weeks blog can be found here: https://blogs.synopsys.com/tousbornottousb/2016/02/12/will-usb-type-c-burn-my-device/

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Posted in Admin and General, Humor, Mick's Projects |

 

Preventing Electrostatic Discharge

Recently I witnessed a user of our HAPS-70 systems touch the system without taking any Electrostatic Discharge, ESD, precautions. While the units are prototypes and it’s expected that they are customized with both off the shelf and custom daughter boards and of course design specific FPGA bit files, you cannot forget ESD precautions. The HAPS-70 systems utilize the Xilinx Virtex-7 2000T FPGA’s which are fabricated in a 28nm process. The smaller the geometry the more susceptible they are to ESD. You must never, never, never handle FPGA-based prototyping hardware without taking ESD precautions.

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Posted in Admin and General |

 

Xilinx UltraScale VU440 Integrated Design Implementation and Debug

Pictured in the Synopsys lab, above, is one of the fully operational next generation HAPS systems. I was asked multiple times this week why Synopsys has not publically announced the systems when the hardware is fully operational. There are a number of factors which make up the reason with the most important being that hardware is only a fraction of the challenge of FPGA-based prototyping. You cannot be successful without an implementation tool flow and that tool flow must be tested against the real hardware. We will announce when the complete solution is ready to go and can make customers immediately productive. Saying that, if you want early access to the HAPS ProtoCompiler software tool set and HAPS hardware with engineering sample Xilinx FPGA’s then contact me or your local Synopsys representative. We are already collaborating with over 20 customers in preparation for full availability.

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Posted in Admin and General, UltraScale |

 

SYNOPSYS SETS NEW STANDARDS FOR FPGA-BASED PROTOTYPING WITH COMPLETE PROTOTYPING PLATFORM

SYNOPSYS SETS NEW STANDARDS FOR FPGA-BASED PROTOTYPING WITH COMPLETE PROTOTYPING PLATFORM…. Yes, we did this way back in 2010 with the launch of the HAPS-60 complete solution, and then raised the bar in 2012 with the launch of the evolutionary HAPS-70 complete solution. Synopsys HAPS is a proven integrated solution delivering the fastest time to operational prototype, highest system performance, superior debug and advanced capabilities including Hybrid Prototyping and global server farm access.

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Posted in Admin and General, ASIC Verification, Bug Hunting, DWC IP Prototyping Kits, Early Software Development, HW/SW Integration, Hybrid Prototyping, In-System Software Validation, IP Validation, Man Hours Savings, Milestones, Performance Optimization, Real Time Prototyping, Support, System Validation, Use Modes |

 

Success Prototyping with UltraScale VU440 devices

It’s been a while since Xilinx shipped the first UltraScale VU440 engineering sample devices to Synopsys so I thought it time to deliver a short update on development progress. It might be hard to see in the above but that is a picture of one of the new development HAPS systems for the UltraScale VU440 devices. I say hard to see not only as the picture quality is low but also because we have the system completely configured with intelligent interconnect as part of our stringent characterization and functional validation process.

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Posted in Admin and General, ASIC Verification, Bug Hunting, Daughter Boards, Debug, DWC IP Prototyping Kits, Early Software Development, FPGA-Based Prototyping, HW/SW Integration, Hybrid Prototyping, In-System Software Validation, IP Validation, Man Hours Savings, Milestones, Project management, Real Time Prototyping, System Validation, UltraScale, Use Modes |

 

Coming To A Lab Soon: Xilinx VU440 FPGA Devices

In late 2013 I blogged about the newly announced Xilinx UltraScale devices, the VU440 specifically that will be the largest FPGA device on the market: http://blogs.synopsys.com/breakingthethreelaws/2013/12/xilinx-fpga%E2%80%99s-for-fpga-based-prototyping/

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Posted in Admin and General, ASIC Verification, Bug Hunting, Debug, Early Software Development, FPGA-Based Prototyping, HW/SW Integration, In-System Software Validation, Man Hours Savings, Milestones, Technical, Tips and Traps |

 

Synopsys’ New ProtoCompiler Software Speeds Time to Prototype

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Posted in Admin and General, ASIC Verification, Bug Hunting, Debug, Early Software Development, FPGA-Based Prototyping, FPMM Methods, Getting Started, HW/SW Integration, In-System Software Validation, Man Hours Savings, Mick's Projects, Milestones, Project management, System Validation, Technical |