Posted by Michael Posner on September 11, 2015
Recently I witnessed a user of our HAPS-70 systems touch the system without taking any Electrostatic Discharge, ESD, precautions. While the units are prototypes and it’s expected that they are customized with both off the shelf and custom daughter boards and of course design specific FPGA bit files, you cannot forget ESD precautions. The HAPS-70 systems utilize the Xilinx Virtex-7 2000T FPGA’s which are fabricated in a 28nm process. The smaller the geometry the more susceptible they are to ESD. You must never, never, never handle FPGA-based prototyping hardware without taking ESD precautions.
The following table illustrates the typical magnitude of the voltage developed in some common situations
Here are Ten points for helping eliminate ESD damage to prototyping hardware
This is not a complete list but covers the basic handling recommendations to reduce ESD damage.
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