Breaking The Three Laws


Prototype ready IP for immediate productivity

MIPI CSI DWC IP Prototyping Kit as seen at SNUG Israel. Hi, thats me, Mick

Back in 2011 I had a vision, a vision for how users of both IP and FPGA-Based Prototypes could be more productive. The problems these users faced was not to do with bugs or lack of capabilities in the products but from the fact that the usage crossed between the two products. IP users traditionally are not experienced prototypers and prototypers lacked IP specific knowledge. Of course this was not helped by the fact that the IP did not document it’s prototyping specific needs. For example, the IP is optimized for ASIC deployment and when you prototype it the clocking, reset and rams sometimes need to be modified to fit into a FPGA environment. Another issue is that as it’s ASIC IP not all configurations can be physically supported in FPGA. For example while the IP might support up to 16 IO ports on the prototype you might only be physically implement up to 4.

So back in 2011 I presented this slide as part of a larger proposal. (Don’t worry, it’s not confidential at this point)

DesignWare IP on HAPS for the Win presentation back from 2011

Eventually this proposal turned into part of Synopsys’ IP Accelerated initiative, the DesignWare IP Prototyping kits. Well I like to think that this was the source of inspiration which lead to the DesignWare IP Prototyping kits. Others “claim” the idea and I’m happy for them to have the glory as they put far more effort taking a vision to reality that I did. It’s still a nice feeling to know that I identified the original need.

Fast forward and there are eight IP protocols supported with over seventeen different configuration varieties including Hybrid IP Prototyping Kit versions.

While at SNUG in Israel recently, the technical marketing manager and I met in front of the MIPI CSI DesignWare IP Prototyping Kit. The picture at the top of the blog is me in front of the demonstration, below is the TMM in front of it.

Hi from the TMM for DesignWare IP Prototyping kits

The funny thing is that this is not really a demo, it’s the actual execution of the DesignWare IP Prototyping kit. This highlights the huge benefit the kits bring to it’s users.

The DesignWare IP Prototyping Kits include the following:

  • Synopsys’ HAPS-DX FPGA-based prototyping system with pre-configured IP and SoC integration logic
  • PHY daughter board
  • Simulation testbench DesignWare ARC-based software development platform running Linux, or PCI Express connection to PC, or Virtualizer Development Kit
  • Reference drivers Application examples

Finally, below is a picture of my favorite coffee mug. Trust me when I say you don’t want to talk to be before I reach the bottom of the mug. I like to say never talk to Mick B.C, Before Coffee. Others within Synopsys have worked out that this is very true but have reduced the quote to “Never talk to Mick”………………. You folks are soooooo funny……

How fast do you run your prototypes? Make a comment and let me know.

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