Breaking The Three Laws


Accelerating Prototyping Hardware Assembly

This week I wanted to focus on a discussion around prototyping hardware assembly.

Prototype hardware assembly is the process to tailor FPGA-prototyping hardware to meet the needs of the project. The first type of prototype assembly would be to build a custom platform directly matching the projects requirements. The building of prototyping hardware is the alternative to buying an off-the-shelf solution. The advantage of building the hardware is that you can tailor it to exactly meet the projects requirements. The disadvantage is this process is time consuming due to the long development timeline and bring-up debug process. I’ve also run into many customers who got burnt at the last minute when marketing made a last minute spec change which the custom platform does not support. Whoops, back to square one to do a frantic redesign which typically results in project delays

This is why off-the-shelf prototyping hardware is so popular. Off-the-shelf prototyping hardware, like HAPS, offers the stability of a pre-designed and validated platform but has the disadvantage of requiring the user to tailor the platform to meet the project’s needs. Some hardware vendors offers interfaces such as Ethernet directly on the prototyping board. The problem with fixed interfaces is that if the project needs them great, if the project does not then the hardware is just wasting IO resources which could be used for other purposes. HAPS is a generic reusable platform which you tailor to meet the needs of the project. There are lots of off-the-shelf daughter boards for this purpose such as DDR3, SRAM, PCIe, Ethernet, SATA, Flash, Lab. However it’s impossible for Synopsys to design and build all types of daughter boards to meet every projects need (but we try hard to). While in Japan last week I visited the Embedded Technology (ET) show in Yokahama and met with a company called Gigafirm. Gigafirm (  has designed a set of HAPS daughter boards supporting the HAPS-70 series of products delivering daughter board support for V-by-One and embedded DisplayPort (eDP)

Above you can see Gigafirms daughter boards installed on a HAPS-70 S24 platform, the HAPS system with two Virtex-7 2000T devices. V-by-One and eDP are used for image and video designs of which there are many design starts at Japanese based customers.The V-By-One Hapstrak 3 (HT3) daughter board enables the THine (

V-By-One evaluation boards to be connected directly the HAPS platform and supports both RX and TX capabilities.

The eDP daughter boards are designed for the HAPS Multi-Gigabit (MGB) connector interface. These high speed daughter boards enable both RX and TX eDP capabilities on the HAPS-70 systems.

I was very impressed with the quality of the Gigafirm deliverables. Gigafrm is helping customers accelerate prototype assembly by providing off-the-shelf high quality daughter boards enabling the HAPS systems to be tailored to meet the designs validation needs.

While at ET in Japan I also say the Fujitsu evaluation and development platform showcase connection to the HAPS-70

The Fujitsu development platform enables customers to evaluate the Fujitsu products and jump starts their software development tasks. The Fujitsu platform interfaces to the HAPS system via a transparent PCIe interface. The connection to HAPS enables customers to extend the platform with the capacity to model their own design blocks and validate them operating against the Fujitsu subsystem.

The Fujitsu evaluation platform is called the Phoenix. What a great name IMO.

It’s great to see the eco-system that has built up around the HAPS FPGA-based prototyping solution.

Finally, thanks to everyone who sent me a note about my allergic reaction that I suffered last week. The good news is that since that time I have only suffered a single smaller reaction which resulted in a fat lip and swollen cheek. I have not pin-pointed what is triggering the reaction but by the process of elimination I am narrowing down the suspect foods.

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