Breaking The Three Laws


I want it all and I want it now, Performance that is

I was recently asked for my recommendation on what needed to be designed into FPGA-based prototyping hardware to enable high performance. This is one of my favorite topics as the answer is almost always a surprise. Prototyping performance is a measure based on design requirements and goals and while 50 MHz may seem slow to some it can be very fast for others and meet all their requirements. Lets have a look at an updated pie chart of prototyping performance from the FPMM survey data to see what engineers are achieving.

From the chart you can see that performance achieved is varied. Going back to the original question, what hardware capabilities enable this performance. Well the answer is it’s not the hardware dummy. Surprise! Well ok, it’s a little bit of the hardware as it has to be to able to support the performance end goal but the real key to performance operation is the implementation tool flow. The tool flow needs to be able to create a prototyping implementation that is tailored for high performance and maintains the accuracy of the original design. Remember that the goal of prototyping is to enable HW/SW integration and SW development and validation so it has to be accurate and high performance as those software engineers want the platform to operate as close to the expected real world performance as possible.

There are a number of tools available on the market to help achieve this but it’s recommended that you utilize a set that is integrated in with the hardware. Integrated tool sets leverage the hardware to produce the optimal implementation. The Synopsys Certify tool is one such integrated tool. It provides high performance multi-FPGA implementations leveraging not only the Synplify Premier synthesis tool but also HAPS system enabled capabilities such as High Speed Time Division Multiplexing, HSTDM for short. Certify is HAPS system aware, it understands the HAPS system you are targeting and will help tailor the implementation to make best use of the hardware capabilities. It understands trace delays, clocking, resets, advanced capabilities such as the on-board visibility UMRBus. It handles these automatically so you don’t have to worry about them. A side benefit of this automation is that the turn-around time from RTL to operational prototype is reduced. So really it’s a win/win. An integrated solution, hardware and software enables reduced turn-around time and yields a high performance, accurate prototyping model, YAY!!!

What tool sets do you use to enable high performance prototype operation?



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