Analog Simulation Insights

Archive for the 'verification' Category

 

MTV 2013 AMS Panel – The Future of Mixed-Signal Verification: from Simple Simulation to Full Regression?

Happy new year ! I chaired and organized a panel on Mixed Signal Verification at MTV 2013 conference last December and wanted to share some of my insights with you.

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Posted in AMS EDA tools, Fast-SPICE, Mixed Signal/Cosimulation, Uncategorized, verification |

 

Optimized Synopsys-MathWorks solution for System-Level Verification

Verification continues to be the most challenging, expensive, and time-consuming phase in ASIC and SoC design processes today. This has been true for many years, and is expected to continue for the foreseeable future. On the business side, semiconductor design is no longer confined to “semiconductor” companies. In the past few years, many electronics, communication, and computer equipment companies have brought ASIC and SoC design activities back in-house. They now consider these designs to be competitive differentiators and crucial intellectual property rather than commodities that should be outsourced. This is – in significant part – driven by an increase in mathematical algorithmic content being engineered into signal, image and video processing, and mixed-signal designs

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Posted in AMS EDA tools, digital, Mixed Signal/Cosimulation, Uncategorized, verification |

 

DesignCon 2014 AMS verification track – Call for papers open until Aug 5th

Happy Thursday ! I can’t believe it is already end of July…

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Posted in AMS Circuits, AMS EDA tools, IEEE Conferences, Uncategorized, verification |

 

DAC 2013 AMS Verification event videolog

 Well after a couple of busy weeks traveling (and I am sure you really care about knowing this :)), I finally found some time to blog about our DAC AMS event held in Austin early June. We had a very successful event with some great technical presentations (hey that’s the feedback I received from the crowd..) from Micron, Broadcom, ST-Ericsson E, ARM and ST-Microelectronics. The topics ranged from low power and reliability and mixed signal verification and advanced memory characterization.

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Posted in AMS Circuits, AMS EDA tools, Device Modeling, EDA, Fast-SPICE, Mixed Signal/Cosimulation, Reliability, SPICE, verification |

 

DAC 2013 AMS Verification Luncheon: Advance Your Mixed-signal Verification Techniques to the Next Level

 

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Posted in AMS Assertions, AMS EDA tools, Mixed Signal/Cosimulation, Reliability, verification |

 

Optimizing your Mixed Signal Verification Environment using CustomExplorer Ultra – Part 2

Blog on Wednesday, Happy hour on Friday 🙂

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Posted in AMS EDA tools, EDA, Mixed Signal/Cosimulation, Uncategorized, verification |

 

Q&A with STE: How to speed up your Mixed Signal Verification with no accuracy loss??

Attractive title, isn’t it? 🙂  I wanted to share with you some benchmarks we conducted with key partners using Discovery-AMS multi-core technology. This feature is available in 2013.3 release for Mixed Signal Verification and allows you to considerably speed up your simulation. Two key advantages of Discovery-AMS are performance and versatility. By combining the efficiency of a Fast-Spice solver with multithreading, we were able to boost performance up to 10X.

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Posted in AMS Circuits, AMS EDA tools, Fast-SPICE, Mixed Signal/Cosimulation, Uncategorized, verification |

 

DVCON 2013 Mixed Signal Verification tutorial: Insights from our Speakers

Yes it is Thursday again 🙂

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Posted in AMS Circuits, AMS EDA tools, Behavioral Modeling, EDA, Fast-SPICE, Mixed Signal/Cosimulation, verification |

 

DesignCon is here !!!

I know you all have been waiting for this blog to be back up 🙂

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Posted in AMS EDA tools, Behavioral Modeling, IEEE Conferences, Mixed Signal/Cosimulation, RF, verification |

 

MTV 2012 Mixed Signal Verification Panel – Can Mixed Signal verification be done with no analog solver ?

Well, it has been a while, hasn’t it? No, I have not been lazy, I have just been busy working on Synopsys amazing portfolio of simulators. 🙂

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Posted in AMS Assertions, AMS EDA tools, Fast-SPICE, Mixed Signal/Cosimulation, verification |