As DesignCon conference approaches and as the chairman of the AMS track, I would like to inform you on a few technical events happening there. In addition to our AMS track, we have added several events:
Well after a couple of busy weeks traveling (and I am sure you really care about knowing this :)), I finally found some time to blog about our DAC AMS event held in Austin early June. We had a very successful event with some great technical presentations (hey that’s the feedback I received from the crowd..) from Micron, Broadcom, ST-Ericsson E, ARM and ST-Microelectronics. The topics ranged from low power and reliability and mixed signal verification and advanced memory characterization.
Synopsys Invited FinFET talk at WMED: Q&A on FinFET variability and its impact on digital and analog circuits
If you have been following my blog, you may have noticed a couple of posts on FinFET technology, mostly on the modeling side. I recently worked with the WMED committee to look at innovative subjects (especially for those spots after lunch time :)). One topic we selected was the challenges faced by analog and digital designers when using a FinFET based process.
Q&A : How ST optimized their validation flow and decreased turn-around time by 8X using Synopsys Custom Explorer
You may have watched the previous video I posted on CustomExplorer Ultra (if not, it is not too late :)). A very interesting feature of this tool is its Waveform comparison capability.
After three weeks of well-deserved Mediterranean vacations :), I am back on line. Don’t worry, I am not going to talk about my open-water swim experiences, but about the call for papers for 2013 WMED, which is scheduled to take place on Friday, April 12, 2013 in the Student Union Building of Boise State University. http://www.ewh.ieee.org/r6/boise/wmed2013/WMED2013.html
Happy Thursday !
Posted in AMS Assertions, AMS Circuits, AMS EDA tools, analog, Analog and Custom Layout, analog design, Behavioral Modeling, Cell Characterization, Custom Designer, Device Modeling, EDA, Fast-SPICE, Mixed Signal/Cosimulation, Nanometer CMOS, Reliability, RF, Signal Integrity, SPICE, verification