Analog Simulation Insights

Archive for the 'SPICE' Category

 

Q&A : How ST optimized their validation flow and decreased turn-around time by 8X using Synopsys Custom Explorer

You may have watched the previous video I posted on CustomExplorer Ultra (if not, it is not too late :)). A very interesting feature of this tool is its Waveform comparison capability.

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Posted in AMS EDA tools, analog, Device Modeling, EDA, Fast-SPICE, Mixed Signal/Cosimulation, SPICE, Uncategorized |

 

UCSC Synopsys AMS Mixed-Signal verification class coming your way this summer !

If you need a very thorough refresh and/or advanced class on Analog Mixed Signal simulation, I have some good news for you 🙂 ! I have been working with a team of experts to create a class on AMS verification for UCSC. I will be teaching this class this summer every Tuesday night from June 19th to July 27th, as part of UCSC evening classes offering. So in addition to enjoy my remarkable teaching skills :), you will hear the latest on Analog Mixed signal verification, from basic simulation topics (design types, analog and digital solvers, communication interface) to more advanced features (Behavioral modeling, real number modeling, AMS verification flow). We designed this class to present some basic concepts first, and to naturally evolve to more complex elements necessary for today AMS and SOC designs. We will be using Synopsys CustomSim-VCS, Custom Designer and CustomExplorer Ultra tools to showcase Synopsys advanced mixed signal solution. Synopsys CustomSim-VCS mixed signal flow has been used successfully by many large corporations and has been chosen for performance, robustness and ease of use.

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Posted in AMS EDA tools, Fast-SPICE, Mixed Signal/Cosimulation, SPICE, Uncategorized |

 

HSPICE SIG event summary – Interview with our speakers – Overall impression and HSPICE latest features

yes, an other field trip report 🙂  You may remember we held our HSPICE Special Interest Group event during DesignCon week. This event gives you an opportunity to talk with Synopsys HSPICE R&D personnel and hear what our customers have to say about using HSPICE in today’s most challenging designs.

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Posted in AMS EDA tools, analog, EDA, SPICE, Uncategorized |

 

Q&A: Post-DesignCon Insights from our AMS tutorial speakers

Happy Friday,

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Posted in AMS Circuits, AMS EDA tools, analog, Signal Integrity, SPICE, Uncategorized |

 

10 tips to improve performance using HSPICE

Good morning ! well, since this is a technical blog, I thought I owed you some tools-related posts 🙂 I am compiling below 10 tips to make your HSPICE simulation even more efficient 🙂

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Posted in analog, analog design, SPICE, Uncategorized |

 

Back from DesignCon !

Well, I have to say DesignCon 2012 was a complete success. Attendance was high and many industry topics were covered.

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Posted in AMS Circuits, analog, analog design, Behavioral Modeling, EDA, Fast-SPICE, Mixed Signal/Cosimulation, Signal Integrity, SPICE |

 

Almost time for Signal Integrity social hour !

Happy Thursday !

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Posted in AMS Circuits, AMS EDA tools, Device Modeling, Signal Integrity, SPICE |

 

Welcome Again!

Hello!

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Posted in AMS Assertions, AMS Circuits, AMS EDA tools, analog, Analog and Custom Layout, analog design, Behavioral Modeling, Cell Characterization, Custom Designer, Device Modeling, EDA, Fast-SPICE, Mixed Signal/Cosimulation, Nanometer CMOS, Reliability, RF, Signal Integrity, SPICE, verification |

 

The Heart of the Problem

Today’s Guest Blogger is Dwayne Holst, Corporate Applications Engineer for CustomExplorer and Custom WaveView at Synopsys.

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Posted in AMS EDA tools, analog, analog design, EDA, Fast-SPICE, SPICE, verification |

 

Parallels

High accuracy analog simulations face the classic problem of scalability. Doubling the size of a design roughly quadruples the size of the matrix and dramatically increases a simulation’s run time to the point where a design team simply cannot wait for it to finish. Conversely, the team cannot proceed without knowing that the design is functioning. Conundrum!

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Posted in AMS Circuits, analog, analog design, EDA, SPICE, verification |