Analog Simulation Insights

Archive for the 'EDA' Category

 

DAC 2015 Synopsys Circuit Simulation Luncheon: Altera, ST, TSMC and Xilinx on Synopsys Industry Leading Performance for Analog Mixed-signal Designs

Improving the performance of existing technologies has always been a key element in the development of computational systems and EDA tools. However, as analog mixed-signal designs complexity drastically increases, conventional techniques are becoming outdated and new technologies must be adopted by designers.

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Posted in AMS EDA tools, EDA, Fast-SPICE, Mixed Signal/Cosimulation, SPICE, verification |

 

DAC 2013 AMS Verification event videolog

 Well after a couple of busy weeks traveling (and I am sure you really care about knowing this :)), I finally found some time to blog about our DAC AMS event held in Austin early June. We had a very successful event with some great technical presentations (hey that’s the feedback I received from the crowd..) from Micron, Broadcom, ST-Ericsson E, ARM and ST-Microelectronics. The topics ranged from low power and reliability and mixed signal verification and advanced memory characterization.

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Posted in AMS Circuits, AMS EDA tools, Device Modeling, EDA, Fast-SPICE, Mixed Signal/Cosimulation, Reliability, SPICE, verification |

 

Optimizing your Mixed Signal Verification Environment using CustomExplorer Ultra – Part 2

Blog on Wednesday, Happy hour on Friday 🙂

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Posted in AMS EDA tools, EDA, Mixed Signal/Cosimulation, Uncategorized, verification |

 

DVCON 2013 Mixed Signal Verification tutorial: Insights from our Speakers

Yes it is Thursday again 🙂

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Posted in AMS Circuits, AMS EDA tools, Behavioral Modeling, EDA, Fast-SPICE, Mixed Signal/Cosimulation, verification |

 

DesignCon Panel on Behavioral modeling summary report- you have all been waiting for it :)

Blog post on Thursday, Happy hour on Friday… so I had to release it today:)

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Posted in AMS EDA tools, analog, analog design, Behavioral Modeling, EDA, Fast-SPICE, Mixed Signal/Cosimulation, RF, SPICE, Uncategorized |

 

Q&A : How ST optimized their validation flow and decreased turn-around time by 8X using Synopsys Custom Explorer

You may have watched the previous video I posted on CustomExplorer Ultra (if not, it is not too late :)). A very interesting feature of this tool is its Waveform comparison capability.

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Posted in AMS EDA tools, analog, Device Modeling, EDA, Fast-SPICE, Mixed Signal/Cosimulation, SPICE, Uncategorized |

 

Optimizing your Mixed Signal Verification Environment using CustomExplorer Ultra – Part 1

With increasing complexity of mixed-signal designs comes a more and more expensive coverage scheme for verification, from the analog as well as the digital side. Finding a verification cockpit combining ease-of-use, performance and required features for both Analog and Digital is therefore not a trivial task.

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Posted in AMS EDA tools, EDA, Fast-SPICE, Mixed Signal/Cosimulation, Uncategorized, verification |

 

AMD talks about advanced regression and verification for Mixed-Signal Designs using CustomExplorerUltra

If you read my blog or other EDA related blogs, you probably have already figured out that verification, specifically for mixed-signal designs, is getting increasingly complex. Different variables have to be taken in consideration: complexity of your design environment or topology, high-volume of regression runs, simulation speed are just a few of those . The verification methodology has also to support multiple languages, and work with different netlist formats available across the industry. As such, there is a crucial need for an integrated mixed-signal verification environment that focuses on functionality, reliability, and performance.

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Posted in AMS Circuits, AMS EDA tools, EDA, Fast-SPICE, Mixed Signal/Cosimulation, verification |

 

Q&A with ST-Ericsson: Latest ERC flow innovations using CustomSim CCK for optimal verification coverage

Circuit design implementation has become increasingly complex in deep submicron technologies. Multiple processor cores, I/Os peripherals, complex analog circuits, and logic are now being implemented onto the same chip. Ensuring product reliability to meet design goals and to achieve good yield has become a crucial step in today design cycle. With complex IP, system integration, and multiple power domains, you need an extremely flexible and powerful EDA solution to tackle those circuit verification demands.

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Posted in AMS Circuits, AMS EDA tools, analog design, EDA, Fast-SPICE, Reliability, verification |

 

HSPICE SIG event summary – Interview with our speakers – Overall impression and HSPICE latest features

yes, an other field trip report 🙂  You may remember we held our HSPICE Special Interest Group event during DesignCon week. This event gives you an opportunity to talk with Synopsys HSPICE R&D personnel and hear what our customers have to say about using HSPICE in today’s most challenging designs.

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Posted in AMS EDA tools, analog, EDA, SPICE, Uncategorized |