Posted by Anand Thiruvengadam on February 9, 2017
Happy Thursday folks!
If you recall, HSPICE SIG was held in Santa Clara last Thursday (2/2/17). It was well attended and quite successful! Details on the event coming soon…
Next on the “SIG series” is AMS SIG India. It is being held in Bengaluru on February 16th (next Thursday). So for all the folks in India and for those who are planning to be in Bengaluru next week, it will be a great opportunity to listen to distinguished speakers from Samsung, Xilinx, Qualcomm, STMicroelectronics and Synopsys R&D, and to connect with fellow AMS design and verification engineers.
The speakers will share their insights about using Synopsys’ custom design and AMS verification tools to address some of today’s most common design and verification challenges. They will also discuss key trends influencing design and verification for FinFETs, as well as future verification methodology and tool requirements to support modern AMS verification.
Here are some additional details:
Date: February 16th, 2017
Time: 11:00 a.m. – 3:20 p.m.
|Courtyard Marriott Hotel|
|Marathahalli-Bellandur Outer Ring Road
|11:15 a.m. – 11:45 a.m.||Keynote: Samsung: “Challenges and Approaches to Foundation IP Design in Advanced CMOS Technologies”|
|11:45 a.m. – 12:15 p.m.||Qualcomm: “Characterizing Multi-bit Flip-Flops with SiliconSmart”|
|12:15 p.m. – 1:15 p.m.||Lunch|
|1:15 p.m. – 1:45 p.m.||STMicroelectronics: “Reducing Memory Compiler Development Time Using Custom Compiler”|
|1:45 p.m. – 2:15 p.m.||Xilinx: “Advanced DDR4 PHY DQ-DQS Calibration Verification Using VCS AMS Monte Carlo Variation”|
|2:15 p.m. – 2:30 p.m.||Tea|
|2:30 p.m. – 3:00 p.m.||Keynote: Synopsys: “It is Rocket Science, But We Can Help! — A Synopsys Perspective on AMS FinFET Design”|
|3:00 p.m. – 3:20 p.m.||Prize Drawing and Closing Remarks|
We look forward to seeing you there!